Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Avoid wide signals in sensitivity lists of immediate assertions #229

Merged
merged 1 commit into from
Oct 3, 2024

Avoid wide signals in sensitivity lists of immediate assertions

38a94fe
Select commit
Loading
Failed to load commit list.
Sign in for the full log view
Merged

Avoid wide signals in sensitivity lists of immediate assertions #229

Avoid wide signals in sensitivity lists of immediate assertions
38a94fe
Select commit
Loading
Failed to load commit list.
GitHub Actions / verible-verilog-lint succeeded Oct 3, 2024 in 1s

reviewdog [verible-verilog-lint] report

reported by reviewdog 🐶

Findings (0)
Filtered Findings (0)
View more details on GitHub Actions