[rtl] Fix counter reset value on FPGA #240
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10 errors
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Run Ibex RTL CI for small configuration
The RISC-V compliance test suite failed for rv32i
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Run Ibex RTL CI for small configuration
Expected failure for rv32i, see lowrisc/ibex#100 more more information.
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Run Ibex RTL CI for opentitan configuration
The RISC-V compliance test suite failed for rv32i
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Run Ibex RTL CI for opentitan configuration
Expected failure for rv32i, see lowrisc/ibex#100 more more information.
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Run Ibex RTL CI for maxperf configuration
The RISC-V compliance test suite failed for rv32i
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Run Ibex RTL CI for maxperf configuration
Expected failure for rv32i, see lowrisc/ibex#100 more more information.
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Run Ibex RTL CI for maxperf-pmp-bmbalanced configuration
The RISC-V compliance test suite failed for rv32i
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Run Ibex RTL CI for maxperf-pmp-bmbalanced configuration
Expected failure for rv32i, see lowrisc/ibex#100 more more information.
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Run Ibex RTL CI for maxperf-pmp-bmfull configuration
The RISC-V compliance test suite failed for rv32i
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Run Ibex RTL CI for maxperf-pmp-bmfull configuration
Expected failure for rv32i, see lowrisc/ibex#100 more more information.
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