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[rtl] Fix counter reset value on FPGA #240

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[rtl] Fix counter reset value on FPGA

[rtl] Fix counter reset value on FPGA #240

Triggered via pull request November 27, 2024 14:31
@nasahlpanasahlpa
opened #2226
nasahlpa:fix_counter_reset_value
Status Success
Total duration 11m 41s
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10 errors
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The RISC-V compliance test suite failed for rv32i
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Expected failure for rv32i, see lowrisc/ibex#100 more more information.
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The RISC-V compliance test suite failed for rv32i
Run quality checks (Lint and DV)
Expected failure for rv32i, see lowrisc/ibex#100 more more information.
Run quality checks (Lint and DV)
The RISC-V compliance test suite failed for rv32i
Run quality checks (Lint and DV)
Expected failure for rv32i, see lowrisc/ibex#100 more more information.
Run quality checks (Lint and DV)
The RISC-V compliance test suite failed for rv32i
Run quality checks (Lint and DV)
Expected failure for rv32i, see lowrisc/ibex#100 more more information.
Run quality checks (Lint and DV)
The RISC-V compliance test suite failed for rv32i
Run quality checks (Lint and DV)
Expected failure for rv32i, see lowrisc/ibex#100 more more information.