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Verilog: use zero_extend_exprt #796

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Verilog: use zero_extend_exprt #796

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@kroening kroening commented Nov 1, 2024

This replaces two typecasts by zero_extend_exprt.

@kroening kroening force-pushed the zero-extend branch 2 times, most recently from f8c7c21 to 1a54d5c Compare November 30, 2024 15:19
This replaces two typecasts by zero_extend_exprt.
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