updates based on 3/4/24 TG meeting

changed spec to stable state, updated rev date/history
03/04/2024  issue #349 - Change access to CLIC registers from memory mapped to indirect CSR
03/04/2024  pull #369  - Redefine parameters to no longer specify number of bit implemented but instead specify legal WARL values.
03/04/2024  pull #373  - Add xcause.xpil fields to mandatory reset state.
03/04/2024  issue #371 - Add additional clicinttrig enable for signaling interrupts claimed by xnxti.
03/04/2024  issue #314 - xnxti now also returns SHV trap-handler entries

Signed-off-by: Dan Smathers <[email protected]>