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Merge pull request #6 from pulp-platform/michaero/synth_ci
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Add internal CI
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micprog authored Aug 12, 2024
2 parents b9af1c4 + 70b750a commit aef65a8
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29 changes: 29 additions & 0 deletions .github/workflows/gitlab-ci.yml
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# Copyright 2022 ETH Zurich and University of Bologna.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0

# Author: Alessandro Ottaviano <[email protected]>

name: gitlab-ci

on:
push:
branches: [ main ]
pull_request:
branches: [ main ]
workflow_dispatch:

jobs:
gitlab-ci:
runs-on: ubuntu-latest
steps:
- name: Check Gitlab CI
uses: pulp-platform/pulp-actions/gitlab-ci@v2
if: >
github.repository == 'pulp-platform/memory_island' &&
(github.event_name != 'pull_request' ||
github.event.pull_request.head.repo.full_name == github.repository)
with:
domain: iis-git.ee.ethz.ch
repo: github-mirror/memory_island
token: ${{ secrets.GITLAB_TOKEN }}
4 changes: 4 additions & 0 deletions .gitignore
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Expand Up @@ -8,3 +8,7 @@ work/
transcript
vsim.wlf
vsim_stacktrace*

# Internal CI
/nonfree/
/spyglass/
26 changes: 26 additions & 0 deletions .gitlab-ci.yml
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# Copyright 2023 ETH Zurich and University of Bologna.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
#
# Paul Scheffler <[email protected]>
# Alessandro Ottaviano <[email protected]>

# We initialize the nonfree repo, then spawn a sub-pipeline from it

stages:
- nonfree

init:
stage: nonfree
script: make nonfree-init
artifacts:
paths: [ nonfree/gitlab-ci.yml ]

subpipe:
stage: nonfree
needs: [ init ]
trigger:
include:
- artifact: nonfree/gitlab-ci.yml
job: init
strategy: depend
4 changes: 4 additions & 0 deletions Bender.yml
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Expand Up @@ -28,3 +28,7 @@ sources:
- target: test
files:
- test/axi_memory_island_tb.sv

- target: memory_island_standalone_synth
files:
- test/synth/axi_memory_island_synth.sv
18 changes: 17 additions & 1 deletion Makefile
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Expand Up @@ -4,7 +4,9 @@

# Michael Rogenmoser <[email protected]>

BENDER ?= bender -d $(CURDIR)
MEMORY_ISLAND_ROOT := $(CURDIR)

BENDER ?= bender -d $(MEMORY_ISLAND_ROOT)

VSIM ?= vsim

Expand All @@ -16,3 +18,17 @@ scripts/compile.tcl: Bender.yml Bender.lock
test-vsim: scripts/compile.tcl
$(VSIM) -64 -c -do "quit -code [source scripts/compile.tcl]"
$(VSIM) -64 -do "vsim axi_memory_island_tb -voptargs=+acc; do scripts/debug_wave.do"

test-vsim-bare: scripts/compile.tcl
$(VSIM) -64 -c -do "quit -code [source scripts/compile.tcl]"
$(VSIM) -64 -c -do "vsim axi_memory_island_tb; run -all"

## Internal CI
NONFREE_REMOTE ?= [email protected]:pulp-restricted/memory_island_nonfree.git
NONFREE_COMMIT ?= master

nonfree-init:
git clone $(NONFREE_REMOTE) $(MEMORY_ISLAND_ROOT)/nonfree
cd nonfree && git checkout $(NONFREE_COMMIT)

-include $(MEMORY_ISLAND_ROOT)/nonfree/nonfree.mk
2 changes: 1 addition & 1 deletion src/axi_memory_island_wrap.sv
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Expand Up @@ -48,7 +48,7 @@ module axi_memory_island_wrap #(
parameter int unsigned SpillRspBank = 0,

/// Relinquish narrow priority after x cycles, 0 for never. Requires SpillNarrowReqRouted==0.
parameter int unsigned WidePriorityWait = 0,
parameter int unsigned WidePriorityWait = 1,

/// Banking Factor for the Wide Ports (power of 2)
parameter int unsigned NumWideBanks = (1<<$clog2(NumWideReq))*2*2,
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2 changes: 1 addition & 1 deletion test/axi_memory_island_tb.sv
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Expand Up @@ -696,7 +696,7 @@ module axi_memory_island_tb #(
errors += $countones(mismatch);
if (end_of_sim == '1) begin
$display("Counted %d errors.", errors);
$stop();
$finish(errors);
end
@(posedge clk);
end while (1'b1);
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307 changes: 307 additions & 0 deletions test/synth/axi_memory_island_synth.sv

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