Link real IMM_ROM_EXT into ROM_EXT

hw/top_earlgrey/BUILD

@@ -2,6 +2,10 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load(
+    "//rules:manifest.bzl",
+    "manifest",
+)
 load(
     "//rules/opentitan:defs.bzl",
     "CLEAR_KEY_SET",
@@ -27,6 +31,14 @@ filegroup(
     ],
 )
 
+# The following definition is used to define a null manifest in the signing
+# configuration for execution environments (exec_env) and opentitan_test
+# and opentitan_binary rules. When building the binaries, if the manifest equals
+# to this null manifest, then the signing will be skipped.
+CLEAR_MANIFEST = manifest(d = {
+    "name": "none_manifest",
+})
+
 ###########################################################################
 # FPGA CW310 Environments
 ###########################################################################

rules/opentitan/cc.bzl

@@ -182,6 +182,9 @@ def _build_binary(ctx, exec_env, name, deps, kind):
     )
 
     manifest = get_fallback(ctx, "file.manifest", exec_env)
+    if manifest and str(manifest.owner) == "@@//hw/top_earlgrey:none_manifest":
+        manifest = None
+
     ecdsa_key = get_fallback(ctx, "attr.ecdsa_key", exec_env)
     rsa_key = get_fallback(ctx, "attr.rsa_key", exec_env)
     spx_key = get_fallback(ctx, "attr.spx_key", exec_env)
@@ -226,10 +229,20 @@ def _opentitan_binary(ctx):
     providers = []
     default_info = []
     groups = {}
-    for exec_env in ctx.attr.exec_env:
-        exec_env = exec_env[ExecEnvInfo]
+    for exec_env_target in ctx.attr.exec_env:
+        exec_env = exec_env_target[ExecEnvInfo]
         name = _binary_name(ctx, exec_env)
         deps = ctx.attr.deps + exec_env.libs
+
+        imm_rom_ext_deps = []
+        for dep in ctx.attr.immutable_rom_ext_sections:
+            if exec_env_target.label.name not in dep.label.name:
+                continue
+            imm_rom_ext_deps.append(dep)
+        if ctx.attr.immutable_rom_ext_sections and len(imm_rom_ext_deps) != 1:
+            fail("When building for exec_env {}, found zero or more than one immutable ROM_EXT sections to link: {}".format(imm_rom_ext_deps, exec_env_target))
+        deps += imm_rom_ext_deps
+
         kind = ctx.attr.kind
         provides, signed = _build_binary(ctx, exec_env, name, deps, kind)
         providers.append(exec_env.provider(kind = kind, **provides))
@@ -329,6 +342,10 @@ common_binary_attrs = {
         doc = "Indicates whether the binary is intended for a chip with the immutable ROM_EXT feature enabled.",
         default = False,
     ),
+    "immutable_rom_ext_sections": attr.label_list(
+        providers = [CcInfo],
+        doc = "The list of immutable ROM_EXT sections to be linked in to the binary target.  Only the deps matched with the specific exec_env will be kept.",
+    ),
 }
 
 opentitan_binary = rv_rule(

sw/device/silicon_creator/imm_rom_ext/BUILD

@@ -2,17 +2,26 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load("@lowrisc_opentitan//rules/opentitan:exec_env.bzl", "ExecEnvInfo")
 load("@lowrisc_opentitan//rules/opentitan:transform.bzl", "obj_transform")
 load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU", "opentitan_binary")
 load("//rules:linker.bzl", "ld_library")
-load("//sw/device/silicon_creator/imm_rom_ext:utils.bzl", "imm_rom_ext_section")
+load("//sw/device/silicon_creator/imm_rom_ext:defs.bzl", "DEFAULT_EXEC_ENV")
+load(
+    "//sw/device/silicon_creator/imm_rom_ext:utils.bzl",
+    "create_imm_rom_ext_targets",
+)
 
 package(default_visibility = ["//visibility:public"])
 
 cc_library(
     name = "main_lib",
-    srcs = ["imm_rom_ext.c"],
+    srcs = [
+        "imm_rom_ext.c",
+        "imm_rom_ext_start.S",
+    ],
     hdrs = ["imm_rom_ext.h"],
+    target_compatible_with = [OPENTITAN_CPU],
     deps = [
         ":imm_rom_ext_epmp",
         "//hw/top:flash_ctrl_c_regs",
@@ -52,43 +61,110 @@ cc_library(
 )
 
 ld_library(
-    name = "ld_hello_world",
-    script = "hello_world.ld",
+    name = "ld_common",
+    includes = ["imm_rom_ext_common.ld"],
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey_memory",
         "//sw/device:info_sections",
+        "//sw/device/silicon_creator/lib/base:static_critical_sections",
     ],
 )
 
-cc_library(
-    name = "hello_world",
-    srcs = [
-        "hello_world.c",
-        "hello_world_start.S",
+ld_library(
+    name = "ld_slot_a",
+    script = "imm_rom_ext_slot_a.ld",
+    deps = [
+        ":ld_common",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey_memory",
     ],
-    hdrs = ["hello_world.h"],
-    target_compatible_with = [OPENTITAN_CPU],
+)
+
+ld_library(
+    name = "ld_slot_b",
+    script = "imm_rom_ext_slot_b.ld",
     deps = [
-        "//sw/device/silicon_creator/lib/drivers:uart",
+        ":ld_common",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey_memory",
+    ],
+)
+
+ld_library(
+    name = "ld_slot_virtual",
+    script = "imm_rom_ext_slot_virtual.ld",
+    deps = [
+        ":ld_common",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey_memory",
     ],
 )
 
 opentitan_binary(
-    name = "hello_world_binaries",
-    # TODO(#24368): Support multiple executing environments. Currently all
-    # environments derive the same binary so only one environment is kept here,
-    # but we need to support multiple executing environments and make sure
-    # ROM_EXT targets choose the matched environment when linking IMM_ROM_EXT.
-    exec_env = [
-        "//hw/top_earlgrey:fpga_cw340",
+    name = "main_binaries_slot_a",
+    exec_env = DEFAULT_EXEC_ENV,
+    extra_bazel_features = [
+        "minsize",
+        "use_lld",
     ],
-    linker_script = ":ld_hello_world",
+    linker_script = ":ld_slot_a",
+    manifest = "//hw/top_earlgrey:none_manifest",
     deps = [
-        ":hello_world",
+        ":main_lib",
+        "//sw/device/lib/crt",
     ],
 )
 
-imm_rom_ext_section(
-    name = "hello_world_section",
-    srcs = [":hello_world_binaries"],
+[
+    create_imm_rom_ext_targets(
+        src = ":main_binaries_slot_a",
+        base_name = "main_section_slot_a",
+        exec_env = env,
+    )
+    for env in DEFAULT_EXEC_ENV
+]
+
+opentitan_binary(
+    name = "main_binaries_slot_b",
+    exec_env = DEFAULT_EXEC_ENV,
+    extra_bazel_features = [
+        "minsize",
+        "use_lld",
+    ],
+    linker_script = ":ld_slot_b",
+    manifest = "//hw/top_earlgrey:none_manifest",
+    deps = [
+        ":main_lib",
+        "//sw/device/lib/crt",
+    ],
 )
+
+[
+    create_imm_rom_ext_targets(
+        src = ":main_binaries_slot_b",
+        base_name = "main_section_slot_b",
+        exec_env = env,
+    )
+    for env in DEFAULT_EXEC_ENV
+]
+
+opentitan_binary(
+    name = "main_binaries_slot_virtual",
+    exec_env = DEFAULT_EXEC_ENV,
+    extra_bazel_features = [
+        "minsize",
+        "use_lld",
+    ],
+    linker_script = ":ld_slot_virtual",
+    manifest = "//hw/top_earlgrey:none_manifest",
+    deps = [
+        ":main_lib",
+        "//sw/device/lib/crt",
+    ],
+)
+
+[
+    create_imm_rom_ext_targets(
+        src = ":main_binaries_slot_virtual",
+        base_name = "main_section_slot_virtual",
+        exec_env = env,
+    )
+    for env in DEFAULT_EXEC_ENV
+]

sw/device/silicon_creator/imm_rom_ext/defs.bzl

@@ -2,8 +2,41 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+DEFAULT_EXEC_ENV = [
+    "//hw/top_earlgrey:fpga_cw310",
+    "//hw/top_earlgrey:fpga_cw340",
+    "//hw/top_earlgrey:sim_dv_base",
+    "//hw/top_earlgrey:sim_verilator_base",
+    "//hw/top_earlgrey:silicon_creator",
+]
+
 # The target list should contian prebuilt artifacts and run-time build targets.
-IMM_ROM_EXT_TARGETS = {
-    "nop": "//sw/device/silicon_creator/imm_rom_ext/prebuilts:nop_imm_rom_ext",
-    "hello_world": "//sw/device/silicon_creator/imm_rom_ext:hello_world_section",
+SLOT_A_IMM_ROM_EXT_SECTIONS = {
+    "main": [
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_a_fpga_cw310",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_a_fpga_cw340",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_a_sim_dv_base",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_a_sim_verilator_base",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_a_silicon_creator",
+    ],
+}
+
+SLOT_B_IMM_ROM_EXT_SECTIONS = {
+    "main": [
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_b_fpga_cw310",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_b_fpga_cw340",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_b_sim_dv_base",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_b_sim_verilator_base",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_b_silicon_creator",
+    ],
+}
+
+SLOT_VIRTUAL_IMM_ROM_EXT_SECTIONS = {
+    "main": [
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_virtual_fpga_cw310",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_virtual_fpga_cw340",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_virtual_sim_dv_base",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_virtual_sim_verilator_base",
+        "//sw/device/silicon_creator/imm_rom_ext:main_section_slot_virtual_silicon_creator",
+    ],
 }