Update lowrisc_ibex to lowRISC/ibex@667fd20d #25458
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CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_counter.sv This PR touches RTL that is only used in the FPGA configuration. This is okay. |
vogelpi
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Nov 29, 2024
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CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_counter.sv This PR touches RTL that is only used in the FPGA configuration. This is okay. |
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@nasahlpa the FPGA bitstream is failing, would you mind checking if your changes are causing the error? |
This will be resolved once lowRISC/ibex#2228 is merged. |
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I've now merged the other PR in the Ibex repo and you can rebase this one @nasahlpa . |
Update code from upstream repository https://github.com/lowRISC/ibex.git to revision 667fd20d2ede51caececccbcbda3652074424ce2 * [rtl] Fix non-DSP reset in ibex_counter (Pascal Nasahl) * Revert "[rtl] Fix counter reset value on FPGA" (Pascal Nasahl) * [rtl] Fix counter reset value on FPGA (Pascal Nasahl) * [ci] remove Azure Pipelines (Gary Guo) Signed-off-by: Pascal Nasahl <[email protected]>
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Update code from upstream repository
https://github.com/lowRISC/ibex.git to revision
667fd20d2ede51caececccbcbda3652074424ce2