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[WIP] Uniquify top-specific FuseSoC cores and remove Darjeeling's FUSESOC_IGNORE #25401
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[WIP] Uniquify top-specific FuseSoC cores and remove Darjeeling's FUSESOC_IGNORE #25401
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Razer6
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[DRAFT] Uniquify top-specific FuseSoC cores and remove Darjeeling's FUSESOC_IGNORE
[WIP] Uniquify top-specific FuseSoC cores and remove Darjeeling's FUSESOC_IGNORE
Nov 29, 2024
`uv pip compile` currently doesn't appear to adhere to the minimum python version set in `pyproject.toml` even when set with to `=3.8`, so the `--python-version` argument was used. Signed-off-by: Hugo McNally <[email protected]>
Co-authored-by: Alexander Williams <[email protected]> Signed-off-by: Hugo McNally <[email protected]>
In addition to changing to virtual prim cores, quite a few paths had to be updated for FuseSoC's new build directory layout. Note, prim_pkg still exists as prim_pkg_legacy because some RTL beyond the old primitive wrappers depends on the implementation enum. prim_pkg_legacy has been labelled as legacy. Co-authored-by: Alexander Williams <[email protected]> Signed-off-by: Hugo McNally <[email protected]>
Signed-off-by: Hugo McNally <[email protected]>
Because the prim hierarchy has changed, reusing the path would target the flop directly for forcing. This meant that the forcing would delay u_state_flop from snapping back to the FsmError state that should've been held by the flop. Instead, the original path caused the flop in the new hierarchy to be targeted *directly*, delaying update until the next posedge, instead of the negedge when forcing is released. Retarget forcing to prim_sparse_fsm_flop's state_o output. Signed-off-by: Alexander Williams <[email protected]>
Adjust the paths to fusesoc FPGA outputs to accommodate the extra layer of hierarchy for --build-root. We might want to consider using --work-root to shorten these long paths in the future. Co-authored-by: Alexander Williams <[email protected]> Signed-off-by: Hugo McNally <[email protected]>
We expect file names to match module names. Now that the IPs are virtual cores, rename the files to match the module names that are the new "ABI" (so to speak). Adjust prim_generic, prim_xilinx, and prim_xilinx_ultrascale libraries. Co-authored-by: Hugo McNally <[email protected]> Signed-off-by: Alexander Williams <[email protected]>
Signed-off-by: Hugo McNally <[email protected]>
Signed-off-by: Hugo McNally <[email protected]>
…TL files Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]> clkmgr_sva_ifs Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
Signed-off-by: Andreas Kurth <[email protected]>
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The goal of this PR is to be able to use Darjeeling through FuseSoC (and thus dvsim) To this end, this PR resolves conflicts in FuseSoC core files between Earlgrey and Darjeeling by uniquifying their VLN.
This PR depends on #23555 and requires FuseSoC v2.4 (
pip install fusesoc==2.4
).