Skip to content
CI

[dd, prim] Simplyfing condition to ease coverage closure #4149

Sign in to view logs

[dd, prim] Simplyfing condition to ease coverage closure

[dd, prim] Simplyfing condition to ease coverage closure #4149

Triggered via pull request January 8, 2025 17:32
@antmarzamantmarzam
opened #25814
antmarzam:prim_reg_cdc_arb_cond_cov_simplification
Status Success
Total duration 6h 4m 23s
Artifacts 31

ci.yml

on: pull_request
Lint (quick)
3m 6s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 6m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
1h 41m
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
1h 10m
Earl Grey for CW310 / Build bitstream
Lint (slow)
11m 45s
Lint (slow)
Build documentation
5m 23s
Build documentation
Airgapped build
8m 47s
Airgapped build
Verible lint
1m 4s
Verible lint
Run OTBN smoke Test
2m 31s
Run OTBN smoke Test
Run OTBN crypto tests
20m 37s
Run OTBN crypto tests
Verilated English Breakfast
8m 34s
Verilated English Breakfast
Verilated Earl Grey
1h 27m
Verilated Earl Grey
CW305's Bitstream
23m 57s
CW305's Bitstream
Build Docker Containers
2m 44s
Build Docker Containers
Build and test software
15m 40s
Build and test software
CW310 ROM_EXT Tests  /  FPGA test
8m 2s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
24m 28s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
38m 31s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
32m 7s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
3m 51s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
48s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
5m 48s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
17m 34s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
5m 41s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
43m 17s
CW340 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
3m 43s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
42m 27s
CW310 ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
30s
Verify FPGA jobs
Fit to window
Zoom out
Zoom in

Annotations

8 errors
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.39 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
59 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
56.7 KB
execute_rom_ext_fpga_tests_cw310-targets
519 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
12.7 KB
execute_rom_ext_fpga_tests_cw340-targets
437 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
7.19 KB
execute_rom_fpga_tests_cw310-targets
1.76 KB
execute_rom_fpga_tests_cw310-test-results
47.1 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
37.6 KB
execute_sival_fpga_tests_cw340-targets
502 Bytes
execute_sival_fpga_tests_cw340-test-results
38.8 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.25 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
188 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
435 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
17.2 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.27 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
45.1 KB
partial-build-bin-chip_earlgrey_cw310
6.01 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
6.02 MB
partial-build-bin-chip_earlgrey_cw340
9.9 MB
sw_build_test-test-results
76.5 KB
verilated_englishbreakfast
6.99 MB
verilator_earlgrey-test-results
8.9 KB