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Update lowrisc_ibex to lowRISC/ibex@667fd20d #2918

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Update lowrisc_ibex to lowRISC/ibex@667fd20d

Update lowrisc_ibex to lowRISC/ibex@667fd20d #2918

Re-run triggered December 6, 2024 20:57
@nasahlpanasahlpa
#25458
nasahlpa:update_ibex
Status Success
Total duration 5m 17s
Artifacts 34

ci.yml

on: pull_request
Lint (quick)
2m 53s
Lint (quick)
Earl Grey for CW310  /  Build bitstream
1h 8m
Earl Grey for CW310 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 9m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
1h 22m
Earl Grey for CW340 / Build bitstream
Lint (slow)
14m 46s
Lint (slow)
Airgapped build
10m 36s
Airgapped build
Verible lint
1m 10s
Verible lint
Run OTBN smoke Test
2m 25s
Run OTBN smoke Test
Run OTBN crypto tests
3m 22s
Run OTBN crypto tests
Verilated English Breakfast
7m 46s
Verilated English Breakfast
Verilated Earl Grey
1h 22m
Verilated Earl Grey
CW305's Bitstream
21m 28s
CW305's Bitstream
Build Docker Containers
2m 47s
Build Docker Containers
Build and test software
13m 19s
Build and test software
CW310 Test ROM Tests  /  FPGA test
4m 11s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
38m 21s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
6m 40s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
26m 0s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
34m 48s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
29m 19s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
7m 0s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
51s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
3m 17s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
16m 28s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
4m 27s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
6m 12s
CW340 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
29s
Verify FPGA jobs
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2 errors
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
execute_sival_rom_ext_fpga_tests_cw340-targets
275 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
11.9 KB