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[sival] Improve reliability of UART baud rate test #2355

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[sival] Improve reliability of UART baud rate test

[sival] Improve reliability of UART baud rate test #2355

Triggered via push November 25, 2024 13:53
@jwnrtjwnrt
pushed 29d7b87
master
Status Success
Total duration 1h 53m 43s
Artifacts 31

ci.yml

on: push
Lint (quick)
2m 56s
Lint (quick)
Earl Grey for CW310  /  Build bitstream
1m 49s
Earl Grey for CW310 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1m 42s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
1m 47s
Earl Grey for CW340 / Build bitstream
Lint (slow)
12m 59s
Lint (slow)
Airgapped build
8m 24s
Airgapped build
Verible lint
0s
Verible lint
Verilated English Breakfast
8m 32s
Verilated English Breakfast
Verilated Earl Grey
1h 3m
Verilated Earl Grey
CW305's Bitstream
24m 15s
CW305's Bitstream
Build Docker Containers
2m 57s
Build Docker Containers
Build and test software
14m 59s
Build and test software
CW310 Test ROM Tests  /  FPGA test
3m 48s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
48m 29s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
5m 49s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
21m 24s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
23m 49s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
25m 20s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
10m 49s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
2m 43s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
6m 40s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
15m 11s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
4m 24s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
9m 0s
CW340 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
3m 31s
Cache bitstreams to GCP
Verify FPGA jobs
52s
Verify FPGA jobs
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Annotations

2 errors
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.37 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
56.6 KB
execute_manuf_fpga_tests_cw340-targets
280 Bytes
execute_manuf_fpga_tests_cw340-test-results
16.4 KB
execute_rom_ext_fpga_tests_cw310-targets
491 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
7.66 KB
execute_rom_ext_fpga_tests_cw340-targets
234 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
1.64 KB
execute_rom_fpga_tests_cw310-targets
2.28 KB
execute_rom_fpga_tests_cw310-test-results
62.4 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
200 Bytes
execute_sival_fpga_tests_cw310-targets
780 Bytes
execute_sival_fpga_tests_cw310-test-results
37.7 KB
execute_sival_fpga_tests_cw340-targets
453 Bytes
execute_sival_fpga_tests_cw340-test-results
30.6 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
1.77 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
158 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
275 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
11.9 KB
execute_test_rom_fpga_tests_cw310-targets
337 Bytes
execute_test_rom_fpga_tests_cw310-test-results
6.94 KB
execute_test_rom_fpga_tests_cw340-targets
356 Bytes
execute_test_rom_fpga_tests_cw340-test-results
48.2 KB
partial-build-bin-chip_earlgrey_cw310
6.03 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
5.99 MB
partial-build-bin-chip_earlgrey_cw340
9.5 MB
sw_build_test-test-results
59.5 KB
verilated_englishbreakfast
6.48 MB
verilator_earlgrey-test-results
8.76 KB