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[multitop_dev] Reinstate all_files and remove files from opentitan_{ip,top} #2354

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[multitop_dev] Reinstate all_files and remove files from opentitan_{ip,top}

[multitop_dev] Reinstate all_files and remove files from opentitan_{ip,top} #2354

Triggered via pull request November 25, 2024 13:48
@pamaurypamaury
synchronize #25375
pamaury:multitop_dev_all_files
Status Failure
Total duration 14m 22s
Artifacts 2

ci.yml

on: pull_request
Lint (quick)
2m 57s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
2m 6s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
2m 11s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
2m 11s
Earl Grey for CW310 / Build bitstream
Lint (slow)
10m 52s
Lint (slow)
Airgapped build
4m 7s
Airgapped build
Verible lint
1m 3s
Verible lint
Verilated English Breakfast
7m 52s
Verilated English Breakfast
CW305's Bitstream
1m 52s
CW305's Bitstream
Build Docker Containers
2m 58s
Build Docker Containers
Build and test software
1m 59s
Build and test software
CW310 Manufacturing Tests  /  FPGA test
CW310 Manufacturing Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
CW310 SiVal Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
CW340 Manufacturing Tests / FPGA test
CW340 ROM Tests  /  FPGA test
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
CW340 SiVal Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
CW340 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
CW310 ROM_EXT Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
CW310 Test ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
18s
Verify FPGA jobs
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Annotations

12 errors and 3 warnings
CW305's Bitstream
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.
Earl Grey for CW310 / Build bitstream
Process completed with exit code 1.
Airgapped build
Process completed with exit code 2.
Earl Grey for CW310 Hyperdebug / Build bitstream
Process completed with exit code 1.
Earl Grey for CW340 / Build bitstream
Process completed with exit code 1.
Verify FPGA jobs
Process completed with exit code 7.
Verify FPGA jobs
Process completed with exit code 1.
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Earl Grey for CW310 / Build bitstream
No files were found with the provided path: build-out. No artifacts will be uploaded.
Earl Grey for CW310 Hyperdebug / Build bitstream
No files were found with the provided path: build-out. No artifacts will be uploaded.
Earl Grey for CW340 / Build bitstream
No files were found with the provided path: build-out. No artifacts will be uploaded.

Artifacts

Produced during runtime
Name Size
sw_build_test-test-results
200 Bytes
verilated_englishbreakfast
6.48 MB