Fix byte order in TOTMR register

lan867x/idf_component.yml

@@ -1,8 +1,8 @@
-version: "1.0.1"
+version: "1.0.2"
 targets:
   - esp32
   - esp32p4
 description: LAN867x Ethernet PHY Driver
 url: https://github.com/espressif/esp-eth-drivers/tree/master/lan867x
 dependencies:
-  idf: ">=5.3"
+  idf: ">=5.3"

lan867x/include/esp_eth_phy_lan867x.h

@@ -19,8 +19,8 @@ typedef enum {
     LAN867X_ETH_CMD_G_PLCA_NCNT,                         /*!< Get PLCA node count */
     LAN867X_ETH_CMD_S_PLCA_ID,                           /*!< Set PLCA ID */
     LAN867X_ETH_CMD_G_PLCA_ID,                           /*!< Get PLCA ID */
-    LAN867x_ETH_CMD_S_PLCA_TOT,                          /*!< Set PLCA Transmit Opportunity Timer in incriments of 100ns */
-    LAN867x_ETH_CMD_G_PLCA_TOT,                          /*!< Get PLCA Transmit Opportunity Timer in incriments of 100ns */
+    LAN867X_ETH_CMD_S_PLCA_TOT,                          /*!< Set PLCA Transmit Opportunity Timer in incriments of 100ns */
+    LAN867X_ETH_CMD_G_PLCA_TOT,                          /*!< Get PLCA Transmit Opportunity Timer in incriments of 100ns */
     LAN867X_ETH_CMD_ADD_TX_OPPORTUNITY,                  /*!< Add additional transmit opportunity for chosen node */
     LAN867X_ETH_CMD_RM_TX_OPPORTUNITY,                   /*!< Remove additional transmit opportunity for chosen node */
     LAN867X_ETH_CMD_S_MAX_BURST_COUNT,                   /*!< Set max count of additional packets, set to 0 to disable */

lan867x/src/esp_eth_phy_lan867x.c

@@ -47,33 +47,37 @@ typedef union {
         uint32_t reserved1 : 14;    // Reserved
         uint32_t rst : 1;           // PLCA Reset
         uint32_t en : 1;            // PLCA Enable
+        uint16_t padding1;          // Padding
     };
     uint32_t val;
 } lan867x_plca_ctrl0_reg_t;
 #define ETH_PHY_PLCA_CTRL0_REG_MMD_ADDR (0xCA01)
 
 typedef union {
     struct {
-        uint8_t id;     // PLCA ID
-        uint8_t ncnt;   // Node count
+        uint8_t id;         // PLCA ID
+        uint8_t ncnt;       // Node count
+        uint16_t padding1;  // Padding
     };
     uint32_t val;
 } lan867x_plca_ctrl1_reg_t;
 #define ETH_PHY_PLCA_CTRL1_REG_MMD_ADDR (0xCA02)
 
 typedef union {
     struct {
-        uint8_t reserved1;  // Reserved
         uint8_t totmr;      // Transmit Opportunity Timer
+        uint8_t reserved1;  // Reserved
+        uint16_t padding1;  // Padding
     };
     uint32_t val;
 } lan867x_plca_totmr_reg_t;
 #define ETH_PHY_PLCA_TOTMR_REG_MMD_ADDR (0xCA04)
 
 typedef union {
     struct {
-        uint8_t maxbc;  // Maximum burst count
-        uint8_t btmr;   // Burst timer
+        uint8_t btmr;       // Burst timer
+        uint8_t maxbc;      // Maximum burst count
+        uint16_t padding1;  // Padding
     };
     uint32_t val;
 } lan867x_plca_burst_reg_t;
@@ -254,12 +258,12 @@ static esp_err_t lan867x_custom_ioctl(esp_eth_phy_t *phy, int cmd, void *data)
         ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_read_mmd_register(phy_802_3, MISC_REGISTERS_DEVICE, ETH_PHY_PLCA_CTRL1_REG_MMD_ADDR, &plca_ctrl1.val), err, TAG, "read PLCA_CTRL1 failed");
         *((uint8_t *) data) = plca_ctrl1.id;
         break;
-    case LAN867x_ETH_CMD_S_PLCA_TOT:
+    case LAN867X_ETH_CMD_S_PLCA_TOT:
         ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_read_mmd_register(phy_802_3, MISC_REGISTERS_DEVICE, ETH_PHY_PLCA_TOTMR_REG_MMD_ADDR, &plca_totmr.val), err, TAG, "read PLCA_TOTMR failed");
         plca_totmr.totmr = *((uint8_t *) data);
         ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_write_mmd_register(phy_802_3, MISC_REGISTERS_DEVICE, ETH_PHY_PLCA_TOTMR_REG_MMD_ADDR, plca_totmr.val), err, TAG, "write PLCA_TOTMR failed");
         break;
-    case LAN867x_ETH_CMD_G_PLCA_TOT:
+    case LAN867X_ETH_CMD_G_PLCA_TOT:
         ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_read_mmd_register(phy_802_3, MISC_REGISTERS_DEVICE, ETH_PHY_PLCA_TOTMR_REG_MMD_ADDR, &plca_totmr.val), err, TAG, "read PLCA_TOTMR failed");
         *((uint8_t *) data) = plca_totmr.totmr;
         break;