Generated from stm32-data 6dbba9fcfebd2af002b380eed0a63ea16ca1e34e

embassy-rs · Feb 2, 2025 · e57ff7c · e57ff7c
1 parent 7c3bd7c
commit e57ff7c
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Showing 3 changed files with 7 additions and 7 deletions.
diff --git a/data/registers/rtc_v3.json b/data/registers/rtc_v3.json
@@ -373,7 +373,7 @@
         "bit_size": 1
       },
       {
-        "name": "ALRAIE",
+        "name": "ALRIE",
         "description": "Alarm interrupt enable",
         "bit_offset": 12,
         "bit_size": 1,

diff --git a/stm32-metapac/src/peripherals/rtc_v3.rs b/stm32-metapac/src/peripherals/rtc_v3.rs
@@ -663,15 +663,15 @@ pub mod regs {
         }
         #[doc = "Alarm interrupt enable"]
         #[inline(always)]
-        pub const fn alraie(&self, n: usize) -> bool {
+        pub const fn alrie(&self, n: usize) -> bool {
             assert!(n < 2usize);
             let offs = 12usize + n * 1usize;
             let val = (self.0 >> offs) & 0x01;
             val != 0
         }
         #[doc = "Alarm interrupt enable"]
         #[inline(always)]
-        pub fn set_alraie(&mut self, n: usize, val: bool) {
+        pub fn set_alrie(&mut self, n: usize, val: bool) {
             assert!(n < 2usize);
             let offs = 12usize + n * 1usize;
             self.0 = (self.0 & !(0x01 << offs)) | (((val as u32) & 0x01) << offs);
@@ -860,7 +860,7 @@ pub mod regs {
                 .field("alre", &[self.alre(0usize), self.alre(1usize)])
                 .field("wute", &self.wute())
                 .field("tse", &self.tse())
-                .field("alraie", &[self.alraie(0usize), self.alraie(1usize)])
+                .field("alrie", &[self.alrie(0usize), self.alrie(1usize)])
                 .field("wutie", &self.wutie())
                 .field("tsie", &self.tsie())
                 .field("add1h", &self.add1h())
@@ -893,7 +893,7 @@ pub mod regs {
                 alre: [bool; 2usize],
                 wute: bool,
                 tse: bool,
-                alraie: [bool; 2usize],
+                alrie: [bool; 2usize],
                 wutie: bool,
                 tsie: bool,
                 add1h: bool,
@@ -920,7 +920,7 @@ pub mod regs {
                 alre: [self.alre(0usize), self.alre(1usize)],
                 wute: self.wute(),
                 tse: self.tse(),
-                alraie: [self.alraie(0usize), self.alraie(1usize)],
+                alrie: [self.alrie(0usize), self.alrie(1usize)],
                 wutie: self.wutie(),
                 tsie: self.tsie(),
                 add1h: self.add1h(),

diff --git a/stm32-metapac/src/registers/rtc_v3.rs b/stm32-metapac/src/registers/rtc_v3.rs
@@ -889,7 +889,7 @@ pub(crate) static REGISTERS: IR = IR {
                     enumm: None,
                 },
                 Field {
-                    name: "alraie",
+                    name: "alrie",
                     description: Some(
                         "Alarm interrupt enable",
                     ),