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samv7/spi: fix ifdelay setup in spi_setdelay call #15900

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4 changes: 2 additions & 2 deletions arch/arm/src/samv7/sam_spi.c
Original file line number Diff line number Diff line change
Expand Up @@ -1157,7 +1157,7 @@ static int spi_setdelay(struct spi_dev_s *dev, uint32_t startdelay,
regval |= (uint32_t) dlybs << SPI_CSR_DLYBS_SHIFT;
spi_putreg(spi, regval, offset);

/* stopdelay = DLYBCT: Delay Between Consecutive Transfers.
/* ifdelay = DLYBCT: Delay Between Consecutive Transfers.
* This field defines the delay between two consecutive transfers with the
* same peripheral without removing the chip select. The delay is always
* inserted after each transfer and before removing the chip select if
Expand All @@ -1171,7 +1171,7 @@ static int spi_setdelay(struct spi_dev_s *dev, uint32_t startdelay,
*/

dlybct = SAM_SPI_CLOCK;
dlybct *= stopdelay;
dlybct *= ifdelay;
dlybct /= 1000000000;
dlybct /= 32;
regval = spi_getreg(spi, offset);
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