Merge pull request #154 from pulp-platform/add_travis_ci

Add travis ci

.travis.yml

@@ -0,0 +1,100 @@
+language: cpp
+# run on new infrastructure
+sudo: false
+cache:
+  apt: true
+  directories:
+    $RISCV
+    $VERILATOR_ROOT
+  timeout: 1000
+
+# required packages to install
+addons:
+  apt:
+    sources:
+      - ubuntu-toolchain-r-test
+    packages:
+      - gcc-7
+      - g++-7
+      - gperf
+      - autoconf
+      - automake
+      - autotools-dev
+      - libmpc-dev
+      - libmpfr-dev
+      - libgmp-dev
+      - gawk
+      - build-essential
+      - bison
+      - flex
+      - texinfo
+      - python-pexpect
+      - libusb-1.0-0-dev
+      - default-jdk
+      - zlib1g-dev
+      - valgrind
+env:
+  global:
+    - RISCV="/home/travis/riscv_install"
+    - VERILATOR_ROOT="/home/travis/verilator-4.018"
+
+
+before_install:
+  - export CXX=g++-7 CC=gcc-7
+  # setup dependent paths
+  - export PATH=$RISCV/bin:$VERILATOR_ROOT/bin:$PATH
+  - export LIBRARY_PATH=$RISCV/lib
+  - export LD_LIBRARY_PATH=$RISCV/lib
+  - export C_INCLUDE_PATH=$RISCV/include:$VERILATOR_ROOT/share/verilator/include
+  - export CPLUS_INCLUDE_PATH=$RISCV/include:$VERILATOR_ROOT/share/verilator/include
+  - export PKG_CONFIG_PATH=$VERILATOR_ROOT/share/pkgconfig
+  # number of parallel jobs to use for make commands and simulation
+  - export NUM_JOBS=4
+  - ci/make-tmp.sh
+  - git submodule update --init --recursive
+
+stages:
+  - checkout
+  - compile1
+  - compile2
+  - test
+
+jobs:
+  include:
+    - stage: checkout
+      name: checkout gcc
+      script:
+        - travis_wait 120 ci/build-riscv-gcc.sh 0
+
+    - stage: compile1
+      name: build gcc
+      script:
+        - travis_wait 120 ci/build-riscv-gcc.sh 1
+        - rm -rf $RISCV/riscv-gnu-toolchain
+    - stage: compile2
+      name: build tools
+      script:
+        - ci/install-verilator.sh
+
+    - stage: test
+      name: run riscv tests
+      script:
+        - make -C tb/core firmware-veri-run
+    - stage: test
+      name: run verilator model
+      script:
+        - make -C tb/verilator-model/ all && ./tb/verilator-model/testbench
+    - stage: test
+      name: run riscv-compliance suite
+      script:
+        - export RISCV_PREFIX=riscv32-unknown-elf-
+        - export RISCV_DEVICE=rv32imc
+        - export RISCV_TARGET=ri5cy
+        - export TARGET_SIM=${TRAVIS_BUILD_DIR}/tb/core/testbench_verilator
+        - git clone https://github.com/bluewww/riscv-compliance.git -b target-ri5cy
+        - make -C tb/core verilate
+        - make -C riscv-compliance/ RISCV_ISA=rv32im && make -C riscv-compliance/ RISCV_ISA=rv32imc
+#        - make -C riscv-compliance/ RISCV_ISA=rv32i # this is borked
+
+# extra time during long builds
+install: travis_wait

README.md

@@ -1,3 +1,5 @@
+[![Build Status](https://travis-ci.org/pulp-platform/riscv.svg?branch=master)](https://travis-ci.org/pulp-platform/riscv)
+
 # RI5CY: RISC-V Core
 
 RI5CY is a small 4-stage RISC-V core. It started its life as a
@@ -16,4 +18,4 @@ PULP and PULPino.
 ## Documentation
 
 A datasheet that explains the most important features of the core can be found
-in  the doc folder.
+in  the doc folder.

ci/build-riscv-gcc.sh

@@ -0,0 +1,33 @@
+#!/bin/bash
+# call with first argument = 0 to checkout only
+set -o pipefail
+set -e
+
+ROOT=$(cd "$(dirname "${BASH_SOURCE[0]}")/.." && pwd)
+VERSION="a03290eab661e2aa58288ad164f908bbbcc2169c"
+
+mkdir -p $RISCV
+
+cd $RISCV
+
+if [ -z ${NUM_JOBS} ]; then
+    NUM_JOBS=1
+fi
+
+
+if ! [ -e $RISCV/bin ]; then
+    if ! [ -e $RISCV/riscv-gnu-toolchain ]; then
+        git clone https://github.com/riscv/riscv-gnu-toolchain.git
+    fi
+
+    cd riscv-gnu-toolchain
+    git checkout $VERSION
+    git submodule update --init --recursive
+
+    if [[ $1 -ne "0" || -z ${1} ]]; then
+      echo "Compiling RISC-V Toolchain"
+      ./configure --disable-linux --disable-multilib --disable-gdb --prefix=$RISCV --with-arch=rv32gc --with-abi=ilp32
+      make -j${NUM_JOBS} | tail
+      echo "Compilation Finished"
+    fi
+fi

ci/install-verilator.sh

@@ -0,0 +1,28 @@
+#!/bin/bash
+set -e
+ROOT=$(cd "$(dirname "${BASH_SOURCE[0]}")/.." && pwd)
+cd $ROOT/tmp
+
+if [ -z ${NUM_JOBS} ]; then
+    NUM_JOBS=1
+fi
+
+if [ ! -e "$VERILATOR_ROOT/bin/verilator" ]; then
+    echo "Installing Verilator"
+    rm -f verilator*.tgz
+    wget https://www.veripool.org/ftp/verilator-4.018.tgz
+    tar xzf verilator*.tgz
+    rm -f verilator*.tgz
+    cd verilator-4.018
+    mkdir -p $VERILATOR_ROOT
+    # copy scripts
+    autoconf && ./configure --prefix="$VERILATOR_ROOT" && make -j${NUM_JOBS}
+    make install
+    # not obvious to me why these symlinks are missing
+    ln -s $VERILATOR_ROOT/share/verilator/include $VERILATOR_ROOT/include
+    ln -s $VERILATOR_ROOT/share/verilator/bin/verilator_includer \
+       $VERILATOR_ROOT/bin/verilator_includer
+    make test
+else
+    echo "Using Verilator from cached directory."
+fi

ci/make-tmp.sh

@@ -0,0 +1,5 @@
+#!/bin/bash
+set -e
+cd "$(dirname "${BASH_SOURCE[0]}")/.."
+[ -d tmp ] || rm -rf tmp
+mkdir -p tmp

tb/core/Makefile

@@ -174,7 +174,7 @@ verilate-clean:
 
 # fpnew dependencies
 fpnew/src/fpnew_pkg.sv:
-	git clone git@github.com:pulp-platform/fpnew.git --recurse
+	git clone https://github.com/pulp-platform/fpnew --recurse
 
 # run tb and exit
 .PHONY: vsim-run

tb/core/firmware/link.ld

@@ -52,17 +52,26 @@ SECTIONS
 		*(.text);
 		__mem_end = .;
 	} > mem
+	_etext = .;
 
 	.data :
 	{
-		*(.data);
+		__data_begin = .;
+    		*(.data .data.* .gnu.linkonce.d.*)
 	} > mem
 
 	.data.string :
 	{
 		*(.data.string)
 	} > mem
 
+	.sdata :
+	{
+		__sdata_begin = .;
+		*(.sdata .sdata.* .gnu.linkonce.s.*)
+	} > mem
+	_edata = .;
+
 	. = ALIGN(4);
 	__bss_start = .;
 	.bss :
@@ -78,5 +87,7 @@ SECTIONS
 
 	. = ALIGN(4);
 	__bss_end = .;
+	__global_pointer$ = MIN(__sdata_begin + 0x800,
+			    MAX(__data_begin + 0x800, __bss_end - 0x800));
 	_end = .;
 }

tb/core/firmware/start.S

@@ -142,6 +142,13 @@ timer_irq_handler:
  **********************************/
 
 start:
+	/* initialize global pointer */
+.option push
+.option norelax
+1:	auipc gp, %pcrel_hi(__global_pointer$)
+	addi  gp, gp, %pcrel_lo(1b)
+.option pop
+
 	/* start performance counters */
 	jal ra, init_stats
 
@@ -158,7 +165,7 @@ start:
 	/* zero-initialize all registers */
 	addi x1, zero, 0
 	addi x2, zero, 0
-	addi x3, zero, 0
+	/* addi x3, zero, 0 */ /* gp already initialized */
 	addi x4, zero, 0
 	addi x5, zero, 0
 	addi x6, zero, 0

tb/core/riscv_tests/rv64uc/rvc.S

@@ -13,6 +13,9 @@
 RVTEST_RV64U
 RVTEST_CODE_BEGIN
 
+  // https://github.com/riscv/riscv-gnu-toolchain/issues/445
+  // mixed modes should turn of relaxation (?)
+  .option norelax
   .align 2
   .option push
   .option norvc

tb/verilator-model/Makefile

@@ -112,7 +112,8 @@ $(VMK): $(VSRC)
 
 # fpnew dependencies
 fpnew/src/fpnew_pkg.sv:
-	git clone [email protected]:pulp-platform/fpnew.git --recurse
+	git clone https://github.com/pulp-platform/fpnew --recurse
+
 
 .PHONY: clean
 clean: