Update pcmr and pcer addresses, update manual

abettati · Aug 21, 2019 · 4abf452 · 4abf452
1 parent eae1cab
commit 4abf452
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Showing 4 changed files with 10 additions and 7 deletions.
diff --git a/doc/user_manual.doc b/doc/user_manual.doc
diff --git a/rtl/include/riscv_defines.sv b/rtl/include/riscv_defines.sv
@@ -438,9 +438,12 @@ parameter HWLoop1_END           = 12'h7C5; //NON standard read/write (Machine CS
 parameter HWLoop1_COUNTER       = 12'h7C6; //NON standard read/write (Machine CSRs). Old address 12'h7B6;
 
 //Performance Counters
-parameter PerfCounterEventReg   = 12'hCC0; //NON standard read-only (User CSRs). Old address 12'h7A0;
-parameter PerfCounterModeReg    = 12'hCC1; //NON standard read-only (User CSRs). Old address 12'h7A1;
+//event and mode registers
+parameter PCER_USER = 12'hCC0; //NON standard read-only (User CSRs). Old address 12'h7A0;
+parameter PCMR_USER = 12'hCC1; //NON standard read-only (User CSRs). Old address 12'h7A1;
 
+parameter PCER_MACHINE = 12'h7E0; //NON standard read/write (Machine CSRs)
+parameter PCMR_MACHINE = 12'h7E1; //NON standard read/write (Machine CSRs)
 
 // Debug CSR
 parameter CSR_DCSR           = 12'h7b0;

diff --git a/rtl/riscv_cs_registers.sv b/rtl/riscv_cs_registers.sv
@@ -1073,15 +1073,15 @@ end //PULP_SECURE
     // only perform csr access if we actually care about the read data
     if (csr_access_i) begin
       unique case (csr_addr_i)
-        PerfCounterEventReg: begin
+        PCER_USER, PCER_MACHINE: begin
           is_pcer = 1'b1;
           perf_rdata[N_PERF_COUNTERS-1:0] = PCER_q;
         end
-        PerfCounterModeReg: begin
+        PCMR_USER, PCMR_MACHINE: begin
           is_pcmr = 1'b1;
           perf_rdata[1:0] = PCMR_q;
         end
-        12'h79F: begin
+        12'h79F: begin // last pccr register selects all
           is_pccr = 1'b1;
           pccr_all_sel = 1'b1;
         end

diff --git a/tb/core/firmware/stats.c b/tb/core/firmware/stats.c
@@ -30,8 +30,8 @@ void init_stats(void)
 {
     unsigned int pcmr = 1; /* global enable without saturation */
     unsigned int pcer = 3; /* cycles and instr count enable */
-    __asm__ volatile("csrw 0xCC0, %0" ::"r"(pcer));
-    __asm__ volatile("csrw 0xCC1, %0" ::"r"(pcmr));
+    __asm__ volatile("csrw 0x7e0, %0" ::"r"(pcer));
+    __asm__ volatile("csrw 0x7e1, %0" ::"r"(pcmr));
 }
 
 void stats(void)