ZorkCores

Collection of IP cores for Intel FPGAs. Avalon-Bus ready as Qsys-Component.

Available

• AvalonI2S
  • Memory-Mapped I2S Core
  • FIFO and Interrupts
• RISC-V Core "Zwork"
  • RV32IMZicsr Instruction Set
  • 4 / 6 clocks per instruction with on-chip ram
  • Mediocre size / fmax, but tiny code size

Soon™ Available

• AvalonUart (UART core with limited functionality but using FIFO)