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Add clocks property to CPUs in nRF54L series which can be used to get CPU clock frequency #83527

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Add clocks property to CPUs in nRF54L series which can be used to get CPU clock frequency #83527

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413d14c
dts: common: nordic: nrf54l: Add clocks to cpu
nordic-krch Jan 3, 2025
1382123
boards: nordic: nrf54l20pdk: Use DT to set 64M CPU frequency
nordic-krch Jan 3, 2025
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3 changes: 0 additions & 3 deletions boards/nordic/nrf54l20pdk/Kconfig.defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -6,9 +6,6 @@ if BOARD_NRF54L20PDK_NRF54L20_CPUAPP
config ROM_START_OFFSET
default 0x800 if BOOTLOADER_MCUBOOT

config SOC_NRF54LX_SKIP_CLOCK_CONFIG
default y
Comment on lines -9 to -10
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This Kconfig skips the write to NRF_OSCILLATORS:
https://github.com/zephyrproject-rtos/hal_nordic/blob/c563b0e56dfa7e3915637b12b3428e6de36012be/nrfx/mdk/system_nrf54l.c#L73
which may be necessary for certain targets - can you verify this works on L20 currently?

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PLL default is 64 MHz so skip is the same as setting to 64M. I checked that L20 i working correctly with that change.


config SOC_NRF54LX_SKIP_GLITCHDETECTOR_DISABLE
default y

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5 changes: 5 additions & 0 deletions boards/nordic/nrf54l20pdk/nrf54l20_cpuapp_common.dtsi
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Expand Up @@ -27,6 +27,11 @@
status = "okay";
};

&hfpll {
/* For now use 64 MHz clock for CPU and fast peripherals. */
clock-frequency = <DT_FREQ_M(64)>;
};

&lfxo {
load-capacitors = "internal";
load-capacitance-femtofarad = <15500>;
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2 changes: 1 addition & 1 deletion dts/common/nordic/nrf54l20.dtsi
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Expand Up @@ -23,7 +23,7 @@
compatible = "arm,cortex-m33f";
reg = <0>;
device_type = "cpu";
clock-frequency = <DT_FREQ_M(128)>;
clocks = <&hfpll>;
#address-cells = <1>;
#size-cells = <1>;
itm: itm@e0000000 {
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4 changes: 2 additions & 2 deletions dts/common/nordic/nrf54l_05_10_15.dtsi
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Expand Up @@ -27,7 +27,7 @@
compatible = "arm,cortex-m33f";
reg = <0>;
device_type = "cpu";
clock-frequency = <DT_FREQ_M(128)>;
clocks = <&hfpll>;
#address-cells = <1>;
#size-cells = <1>;
itm: itm@e0000000 {
Expand All @@ -41,7 +41,7 @@
compatible = "nordic,vpr";
reg = <1>;
device_type = "cpu";
clock-frequency = <DT_FREQ_M(128)>;
clocks = <&hfpll>;
riscv,isa = "rv32emc";
nordic,bus-width = <32>;
};
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5 changes: 4 additions & 1 deletion modules/hal_nordic/nrfx/CMakeLists.txt
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Expand Up @@ -181,7 +181,10 @@ if(DEFINED uicr_path)
endif()

if(CONFIG_SOC_NRF54L_CPUAPP_COMMON)
dt_prop(clock_frequency PATH "/cpus/cpu@0" PROPERTY "clock-frequency")
# Ideally, hfpll should taken as a phandle from clocks property from cpu but it
# seems that there is no such option in DT cmake functions. Assuming that nrf54l
# is using hfpll as CPU clock source (true for all existing devices).
dt_prop(clock_frequency PATH "/clocks/hfpll" PROPERTY "clock-frequency")
math(EXPR clock_frequency_mhz "${clock_frequency} / 1000000")
zephyr_compile_definitions("NRF_CONFIG_CPU_FREQ_MHZ=${clock_frequency_mhz}")
endif()
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