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boards: add Myra SiP Baseboard #79706
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Convert to webp, then put through https://tinypng.com/
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Done, filesize went down from 93k -> 34k
Supported Features | ||
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The Zephyr ``myra_sip_baseboard`` board configuration supports the following hardware features: |
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*board target
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Fixed
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More I think about it the more it is a no, this is an stm32 with supporting components, they go in the board dts, do not create a "soc sip", use the existing stm32 one. This is no different than e.g. rm1xx_dvk where there is an spi flash inside the module
Hi @nordicjm, thanks for your comment.
This approach would mean that the shared configuration between board targets that share the same SiP would have to include duplicated code that would be otherwise provided by the SiP symbol, though. Additionally, there already are other SIPs defined in a similar way in Zephyr, e.g.:
For now, all the SIPs in supported in Zephyr are produced by the same vendor as the main SoC used in the SIP, however this is not always a case in the real world. Another example (similar to Myra) of such a SIP is https://octavosystems.com/octavo_products/osd32mp15x/ (this one is not yet supported in Zephyr, but we plan to add it soon) |
The 91* and 92* are normal SoCs in tree so I don't see what you mean. The espressif ones are different chips with different internal configurations, this one you have here is just a specific stm32 chip with peripherals around it, there is no reason to do it as you've done it here. Not that SiP's aren't important and support for that in hwmv2 is planned for the future, but there is nothing groundbreaking here that cannot be done as every other "SiP" in zephyr is done with a normal SoC definition for the actual SoC and then anything inside of a "package" being done at board level |
Those nRFs mentioned by @kgugala are referred to as SiPs by comments in their respective Kconfigs. As for Plus, on the vendor's site nRF9161 is also explicitly called a SiP: https://www.nordicsemi.com/Products/nRF9161.
And as for
Additionally, this file also states the following: https://github.com/zephyrproject-rtos/zephyr/blob/main/soc/nordic/nrf92/Kconfig.soc#L12-L14
Which means that those nRFs are explicitly defined as SiPs, and are definitely not "normal" SoCs.
Again, those ESPs that Karol had mentioned are listed under the "SiP" section comment in their respective Kconfig files:
That's not exactly true, which the examples above prove. I.e. And here's the Kconfig snippet which demonstrates the Kconfig symbol chain: https://github.com/zephyrproject-rtos/zephyr/blob/main/soc/nordic/nrf91/Kconfig.soc#L31-L41. In summary: this PR doesn't really introduce any new way of defining a SiP; it just chooses the exact same convention that Zephyr had already opted to use. |
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adds driver for the mb85rsm1t fram
adds support for a new SoC in Zephyr - Myra SiP
adds a new target that is based on the Myra SiP - Myra SiP Baseboard
This needs to be split into at least two PRs: One for adding the Myra SiP support along with the baseboard, and another for adding the EEPROM driver (unless the EEPROM driver is needed for the board to boot, but it does not look like it is?).
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Correct - it's not needed for basic operation of the board. I've removed the driver from this PR. |
EEPROM/FRAM driver removed from this PR.
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This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time. |
MAINTAINERS.yml
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- fkokosinski | ||
- kgugala | ||
- tgorochowik |
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2 maintainers should be plenty. Please make whoever is the 3rd name a collaborator
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Done
@@ -0,0 +1,5 @@ | |||
board: | |||
name: myra_sip_baseboard |
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name: myra_sip_baseboard | |
name: myra_sip_baseboard | |
full_name: Myra SiP Baseboard |
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Added full name
.. _myra_sip_baseboard: | ||
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Myra SiP Baseboard | ||
######################## |
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.. _myra_sip_baseboard: | |
Myra SiP Baseboard | |
######################## | |
.. zephyr:board:: myra_sip_baseboard |
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the new directive is now used in the board doc
.. image:: img/myra_sip_baseboard.webp | ||
:align: center | ||
:alt: Myra SiP Baseboard | ||
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.. image:: img/myra_sip_baseboard.webp | |
:align: center | |
:alt: Myra SiP Baseboard |
zephyr:board::
directive automagically adds the image
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removed
Programming and Debugging | ||
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Applications for the ``myra_sip_baseboard`` board configuration can be built and flashed in the usual way (see :ref:`build_an_application` and :ref:`application_run` for more details). |
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Applications for the ``myra_sip_baseboard`` board configuration can be built and flashed in the usual way (see :ref:`build_an_application` and :ref:`application_run` for more details). | |
Applications for the ``myra_sip_baseboard`` board target can be built and flashed in the usual way (see :ref:`build_an_application` and :ref:`application_run` for more details). |
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fixed
toolchain: | ||
- zephyr | ||
- gnuarmemb | ||
- xtools |
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- xtools |
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removed xtools
from the list
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Approving.
There's currently no clean concepts of SiPs in Zephyr, but HWMV2 has paved the way to improve this by offering a better and more scalable model.
But for now, SiPs are generally exposed as being a SoC.
I think the current suggestion of presenting the Myra SiP with it's own SoC name in the soc / board yaml and Kconfig is acceptable as the system is for now.
I also believe it will make it less intrusive when having a true SiP support, as the names / symbols in that case will not need to change (assumption 🙈 ).
Having dedicated SiP Kconfig symbol selecting the true STM SOC also allows to different cases where it's important to distinguish the SiP from the SoC.
CONFIG_UART_CONSOLE=y | ||
CONFIG_ARM_MPU=y | ||
CONFIG_HW_STACK_PROTECTION=y | ||
CONFIG_MAIN_STACK_SIZE=4096 |
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why is this needed? (main stack size, not the rest)
CONFIG_RTC=y | ||
CONFIG_RTC_STM32=y | ||
CONFIG_RTC_LOG_LEVEL_WRN=y |
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why is RTC needed for every single build e.g. hello world?
Add support for the Antmicro's Myra SiP Baseboard. The board uses Antmicro's Myra SiP which integrates STM32G491XX MCU and its SoC configuration. Signed-off-by: Jakub Wasilewski <[email protected]> Signed-off-by: Filip Kokosinski <[email protected]>
This commit adds the `Antmicro platforms` area of maintenance. Signed-off-by: Filip Kokosinski <[email protected]>
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This PR:
adds driver for the mb85rsm1t fram