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Create initial release of minispartan6 audio project
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//----------------------------------------------------------------- | ||
// Audio Controller | ||
// V0.1 | ||
// Ultra-Embedded.com | ||
// Copyright 2012-2019 | ||
// | ||
// Email: [email protected] | ||
// | ||
// License: GPL | ||
// If you would like a version with a more permissive license for | ||
// use in closed source commercial applications please contact me | ||
// for details. | ||
//----------------------------------------------------------------- | ||
// | ||
// This file is open source HDL; you can redistribute it and/or | ||
// modify it under the terms of the GNU General Public License as | ||
// published by the Free Software Foundation; either version 2 of | ||
// the License, or (at your option) any later version. | ||
// | ||
// This file is distributed in the hope that it will be useful, | ||
// but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
// GNU General Public License for more details. | ||
// | ||
// You should have received a copy of the GNU General Public | ||
// License along with this file; if not, write to the Free Software | ||
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
// USA | ||
//----------------------------------------------------------------- | ||
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//----------------------------------------------------------------- | ||
// Generated File | ||
//----------------------------------------------------------------- | ||
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module audio_dac | ||
( | ||
// Inputs | ||
input clk_i | ||
,input rst_i | ||
,input audio_clk_i | ||
,input inport_tvalid_i | ||
,input [ 31:0] inport_tdata_i | ||
,input [ 3:0] inport_tstrb_i | ||
,input [ 3:0] inport_tdest_i | ||
,input inport_tlast_i | ||
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// Outputs | ||
,output inport_tready_o | ||
,output audio_l_o | ||
,output audio_r_o | ||
); | ||
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//----------------------------------------------------------------- | ||
// Params | ||
//----------------------------------------------------------------- | ||
localparam CLK_RATE_KHZ = 50000; | ||
localparam AUDIO_RATE = 44100; | ||
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// Generated params | ||
localparam WHOLE_CYCLES = (CLK_RATE_KHZ*1000) / (AUDIO_RATE*128); | ||
localparam ERROR_BASE = 10000; | ||
localparam [63:0] ERRORS_PER_BIT = ((CLK_RATE_KHZ * 1000 * ERROR_BASE) / (AUDIO_RATE*128)) - (WHOLE_CYCLES * ERROR_BASE); | ||
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//----------------------------------------------------------------- | ||
// External clock source | ||
//----------------------------------------------------------------- | ||
wire bit_clock_w; | ||
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assign bit_clock_w = audio_clk_i; | ||
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//----------------------------------------------------------------- | ||
// Buffer | ||
//----------------------------------------------------------------- | ||
reg [15:0] left_q; | ||
reg [15:0] right_q; | ||
reg pop_q; | ||
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always @ (posedge rst_i or posedge clk_i ) | ||
begin | ||
if (rst_i) | ||
begin | ||
right_q <= 16'b0; | ||
left_q <= 16'b0; | ||
pop_q <= 1'b0; | ||
end | ||
else if (bit_clock_w && inport_tvalid_i) | ||
begin | ||
{right_q, left_q} <= inport_tdata_i; | ||
pop_q <= 1'b1; | ||
end | ||
else | ||
pop_q <= 1'b0; | ||
end | ||
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assign inport_tready_o = pop_q; | ||
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//----------------------------------------------------------------- | ||
// DAC instances | ||
//----------------------------------------------------------------- | ||
sigma_dac | ||
#( .NBITS(16) ) | ||
u_dac_l | ||
( | ||
.clk_i(clk_i), | ||
.rst_i(rst_i), | ||
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.din_i(left_q), | ||
.dout_o(audio_l_o) | ||
); | ||
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sigma_dac | ||
#( .NBITS(16) ) | ||
u_dac_r | ||
( | ||
.clk_i(clk_i), | ||
.rst_i(rst_i), | ||
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.din_i(right_q), | ||
.dout_o(audio_r_o) | ||
); | ||
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endmodule |
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//----------------------------------------------------------------- | ||
// Audio Controller | ||
// V0.1 | ||
// Ultra-Embedded.com | ||
// Copyright 2012-2019 | ||
// | ||
// Email: [email protected] | ||
// | ||
// License: GPL | ||
// If you would like a version with a more permissive license for | ||
// use in closed source commercial applications please contact me | ||
// for details. | ||
//----------------------------------------------------------------- | ||
// | ||
// This file is open source HDL; you can redistribute it and/or | ||
// modify it under the terms of the GNU General Public License as | ||
// published by the Free Software Foundation; either version 2 of | ||
// the License, or (at your option) any later version. | ||
// | ||
// This file is distributed in the hope that it will be useful, | ||
// but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
// GNU General Public License for more details. | ||
// | ||
// You should have received a copy of the GNU General Public | ||
// License along with this file; if not, write to the Free Software | ||
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
// USA | ||
//----------------------------------------------------------------- | ||
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//----------------------------------------------------------------- | ||
// Generated File | ||
//----------------------------------------------------------------- | ||
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`define AUDIO_CFG 8'h0 | ||
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`define AUDIO_CFG_INT_THRESHOLD_DEFAULT 0 | ||
`define AUDIO_CFG_INT_THRESHOLD_B 0 | ||
`define AUDIO_CFG_INT_THRESHOLD_T 15 | ||
`define AUDIO_CFG_INT_THRESHOLD_W 16 | ||
`define AUDIO_CFG_INT_THRESHOLD_R 15:0 | ||
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`define AUDIO_CFG_BYTE_SWAP 16 | ||
`define AUDIO_CFG_BYTE_SWAP_DEFAULT 0 | ||
`define AUDIO_CFG_BYTE_SWAP_B 16 | ||
`define AUDIO_CFG_BYTE_SWAP_T 16 | ||
`define AUDIO_CFG_BYTE_SWAP_W 1 | ||
`define AUDIO_CFG_BYTE_SWAP_R 16:16 | ||
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`define AUDIO_CFG_CH_SWAP 17 | ||
`define AUDIO_CFG_CH_SWAP_DEFAULT 0 | ||
`define AUDIO_CFG_CH_SWAP_B 17 | ||
`define AUDIO_CFG_CH_SWAP_T 17 | ||
`define AUDIO_CFG_CH_SWAP_W 1 | ||
`define AUDIO_CFG_CH_SWAP_R 17:17 | ||
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`define AUDIO_CFG_TARGET_DEFAULT 0 | ||
`define AUDIO_CFG_TARGET_B 18 | ||
`define AUDIO_CFG_TARGET_T 19 | ||
`define AUDIO_CFG_TARGET_W 2 | ||
`define AUDIO_CFG_TARGET_R 19:18 | ||
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`define AUDIO_CFG_VOL_CTRL_DEFAULT 0 | ||
`define AUDIO_CFG_VOL_CTRL_B 24 | ||
`define AUDIO_CFG_VOL_CTRL_T 26 | ||
`define AUDIO_CFG_VOL_CTRL_W 3 | ||
`define AUDIO_CFG_VOL_CTRL_R 26:24 | ||
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`define AUDIO_CFG_BUFFER_RST 31 | ||
`define AUDIO_CFG_BUFFER_RST_DEFAULT 0 | ||
`define AUDIO_CFG_BUFFER_RST_B 31 | ||
`define AUDIO_CFG_BUFFER_RST_T 31 | ||
`define AUDIO_CFG_BUFFER_RST_W 1 | ||
`define AUDIO_CFG_BUFFER_RST_R 31:31 | ||
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`define AUDIO_STATUS 8'h4 | ||
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`define AUDIO_STATUS_LEVEL_DEFAULT 0 | ||
`define AUDIO_STATUS_LEVEL_B 16 | ||
`define AUDIO_STATUS_LEVEL_T 31 | ||
`define AUDIO_STATUS_LEVEL_W 16 | ||
`define AUDIO_STATUS_LEVEL_R 31:16 | ||
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`define AUDIO_STATUS_FULL 1 | ||
`define AUDIO_STATUS_FULL_DEFAULT 0 | ||
`define AUDIO_STATUS_FULL_B 1 | ||
`define AUDIO_STATUS_FULL_T 1 | ||
`define AUDIO_STATUS_FULL_W 1 | ||
`define AUDIO_STATUS_FULL_R 1:1 | ||
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`define AUDIO_STATUS_EMPTY 0 | ||
`define AUDIO_STATUS_EMPTY_DEFAULT 0 | ||
`define AUDIO_STATUS_EMPTY_B 0 | ||
`define AUDIO_STATUS_EMPTY_T 0 | ||
`define AUDIO_STATUS_EMPTY_W 1 | ||
`define AUDIO_STATUS_EMPTY_R 0:0 | ||
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`define AUDIO_CLK_DIV 8'h8 | ||
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`define AUDIO_CLK_DIV_WHOLE_CYCLES_DEFAULT 0 | ||
`define AUDIO_CLK_DIV_WHOLE_CYCLES_B 0 | ||
`define AUDIO_CLK_DIV_WHOLE_CYCLES_T 15 | ||
`define AUDIO_CLK_DIV_WHOLE_CYCLES_W 16 | ||
`define AUDIO_CLK_DIV_WHOLE_CYCLES_R 15:0 | ||
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`define AUDIO_CLK_FRAC 8'hc | ||
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`define AUDIO_CLK_FRAC_NUMERATOR_DEFAULT 0 | ||
`define AUDIO_CLK_FRAC_NUMERATOR_B 0 | ||
`define AUDIO_CLK_FRAC_NUMERATOR_T 15 | ||
`define AUDIO_CLK_FRAC_NUMERATOR_W 16 | ||
`define AUDIO_CLK_FRAC_NUMERATOR_R 15:0 | ||
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`define AUDIO_CLK_FRAC_DENOMINATOR_DEFAULT 0 | ||
`define AUDIO_CLK_FRAC_DENOMINATOR_B 16 | ||
`define AUDIO_CLK_FRAC_DENOMINATOR_T 31 | ||
`define AUDIO_CLK_FRAC_DENOMINATOR_W 16 | ||
`define AUDIO_CLK_FRAC_DENOMINATOR_R 31:16 | ||
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`define AUDIO_FIFO_WRITE 8'h20 | ||
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`define AUDIO_FIFO_WRITE_CH_B_DEFAULT 0 | ||
`define AUDIO_FIFO_WRITE_CH_B_B 0 | ||
`define AUDIO_FIFO_WRITE_CH_B_T 15 | ||
`define AUDIO_FIFO_WRITE_CH_B_W 16 | ||
`define AUDIO_FIFO_WRITE_CH_B_R 15:0 | ||
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`define AUDIO_FIFO_WRITE_CH_A_DEFAULT 0 | ||
`define AUDIO_FIFO_WRITE_CH_A_B 16 | ||
`define AUDIO_FIFO_WRITE_CH_A_T 31 | ||
`define AUDIO_FIFO_WRITE_CH_A_W 16 | ||
`define AUDIO_FIFO_WRITE_CH_A_R 31:16 | ||
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