CometlakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT

Set the location of the DUTY_CYCLE field in the P_CNT register and indicate the width of the clock duty cycle to OS power management Cc: Chasel Chiu <[email protected]> Cc: Michael Kubacki <[email protected]> Cc: Rangasai V Chaganty <[email protected]> Cc: Deepika Kethi Reddy <[email protected]> Cc: Kathappan Esakkithevar <[email protected]> Signed-off-by: Nate DeSimone <[email protected]> Reviewed-by: Chasel Chiu <[email protected]> Reviewed-by: Michael Kubacki <[email protected]> Reviewed-by: Ankit Sinha <[email protected]>
tianocore · Jun 9, 2022 · 7ce34ff · 7ce34ff
1 parent 148f1bf
commit 7ce34ff
Showing 1 changed file with 8 additions and 1 deletion.
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc
@@ -1,7 +1,7 @@
 ## @file
 #  PCD configuration build description file for the CometlakeURvp board.
 #
-# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2020 - 2022, Intel Corporation. All rights reserved.<BR>
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -253,6 +253,13 @@
   gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8
   gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2
 
+  #
+  # Set the location of the DUTY_CYCLE field in the P_CNT register
+  # and indicate the width of the clock duty cycle to OS power management
+  #
+  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
+  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
+
   #
   # The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
   #