ASoC: SOF: Intel: ptl: Add support for mic privacy

Implement the three callbacks that is needed to enable support for reporting the mic privacy change via soundwire. In PTL the mic privacy reporting is supported via soundwire and DMIC and the soundwire is owned by the host, it's interrupt is routed there. To enable the interrupt, the sublink mask needs to be passed to the multilink layer, the check_mic_privacy_irq/process_mic_privacy callbacks needs to be implemented to check and report the mic privacy change. Signed-off-by: Peter Ujfalusi <[email protected]>
thesofproject · Feb 27, 2025 · cf0443d · cf0443d
1 parent fb1860e
commit cf0443d
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Showing 2 changed files with 61 additions and 2 deletions.
diff --git a/sound/soc/sof/intel/ptl.c b/sound/soc/sof/intel/ptl.c
@@ -18,10 +18,62 @@
 #include "lnl.h"
 #include "ptl.h"
 
-int sof_ptl_set_ops(struct snd_sof_dev *sdev, struct snd_sof_dsp_ops *dsp_ops)
+static bool sof_ptl_check_mic_privacy_irq(struct snd_sof_dev *sdev, bool alt,
+					  int elid)
+{
+	if (alt != 1 || elid != AZX_REG_ML_LEPTR_ID_SDW)
+		return false;
+
+	return hdac_bus_eml_is_mic_privacy_changed(sof_to_bus(sdev), alt, elid);
+}
+
+static void sof_ptl_process_mic_privacy(struct snd_sof_dev *sdev, bool alt,
+					int elid)
+{
+	bool state;
+
+	if (alt != 1 || elid != AZX_REG_ML_LEPTR_ID_SDW)
+		return;
+
+	state = hdac_bus_eml_get_mic_privacy_state(sof_to_bus(sdev), alt, elid);
+
+	sof_ipc4_mic_privacy_state_change(sdev, state);
+}
+
+static void sof_ptl_set_mic_privacy(struct snd_sof_dev *sdev,
+				    struct sof_ipc4_intel_mic_privacy_cap *caps)
 {
-	return sof_lnl_set_ops(sdev, dsp_ops);
+	u32 micpvcp;
+
+	if (!caps || !caps->capabilities_length)
+		return;
+
+	micpvcp = caps->capabilities[0];
+
+	/* No need to set the mic privacy if it is not enabled or forced */
+	if (!(micpvcp & PTL_MICPVCP_DDZE_ENABLED) ||
+	    micpvcp & PTL_MICPVCP_DDZE_FORCED)
+		return;
+
+	hdac_bus_eml_set_mic_privacy_mask(sof_to_bus(sdev), true,
+					  AZX_REG_ML_LEPTR_ID_SDW,
+					  PTL_MICPVCP_GET_SDW_MASK(micpvcp));
 }
+
+int sof_ptl_set_ops(struct snd_sof_dev *sdev, struct snd_sof_dsp_ops *dsp_ops)
+{
+	struct sof_ipc4_fw_data *ipc4_data;
+	int ret;
+
+	ret = sof_lnl_set_ops(sdev, dsp_ops);
+	if (ret)
+		return ret;
+
+	ipc4_data = sdev->private;
+	ipc4_data->intel_configure_mic_privacy = sof_ptl_set_mic_privacy;
+
+	return 0;
+};
 EXPORT_SYMBOL_NS(sof_ptl_set_ops, "SND_SOC_SOF_INTEL_PTL");
 
 const struct sof_intel_dsp_desc ptl_chip_info = {
@@ -41,6 +93,8 @@ const struct sof_intel_dsp_desc ptl_chip_info = {
 	.check_sdw_irq = lnl_dsp_check_sdw_irq,
 	.check_sdw_wakeen_irq = lnl_sdw_check_wakeen_irq,
 	.check_ipc_irq = mtl_dsp_check_ipc_irq,
+	.check_mic_privacy_irq = sof_ptl_check_mic_privacy_irq,
+	.process_mic_privacy = sof_ptl_process_mic_privacy,
 	.cl_init = mtl_dsp_cl_init,
 	.power_down_dsp = mtl_power_down_dsp,
 	.disable_interrupts = lnl_dsp_disable_interrupts,

diff --git a/sound/soc/sof/intel/ptl.h b/sound/soc/sof/intel/ptl.h
@@ -9,6 +9,11 @@
 #ifndef __SOF_INTEL_PTL_H
 #define __SOF_INTEL_PTL_H
 
+#define PTL_MICPVCP_DDZE_FORCED		BIT(16)
+#define PTL_MICPVCP_DDZE_ENABLED	BIT(17)
+#define PTL_MICPVCP_DDZLS_SDW		GENMASK(26, 20)
+#define PTL_MICPVCP_GET_SDW_MASK(x)	(((x) & PTL_MICPVCP_DDZLS_SDW) >> 20)
+
 int sof_ptl_set_ops(struct snd_sof_dev *sdev, struct snd_sof_dsp_ops *dsp_ops);
 
 #endif /* __SOF_INTEL_PTL_H */