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Migrate CBs and Sems to kernel config ring buffer #11595
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@@ -52,7 +52,7 @@ | |||
#define MEM_BOOT_CODE_BASE 0 | |||
#define MEM_L1_BARRIER 12 | |||
#define MEM_MAILBOX_BASE 16 | |||
#define MEM_MAILBOX_END (MEM_MAILBOX_BASE + 1344) | |||
#define MEM_MAILBOX_END (MEM_MAILBOX_BASE + 1348) |
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how do we calculate this value? Could you add comment or make it depend on sum of other defines directly?
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see below
uint32_t tt_l1_ptr *cb_l1_base = (uint32_t tt_l1_ptr *)(kernel_config_base + | ||
mailboxes->launch.kernel_config.cb_offset); | ||
setup_cb_read_write_interfaces(cb_l1_base, 0, mailboxes->launch.kernel_config.max_cb_index, cb_init_read, cb_init_write, cb_init_write); | ||
#if defined(UCK_CHLKC_UNPACK) |
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Can you add a comment about why this delay was added with the issue link?
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yes, will do
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Would be good to run some model ci, ex perf/device perf, to double check perf/also ensure the race workaround works for those tests
Only include ierisc when needed, sometimes the values are 0
Dispatcher is out of memory on ncrisc, disabling for now
Removing the uneeded CB config inits sped up unpacker exposing an as yet unknown timing issue. This delay mimics the delay of the CB config inits to keep tests passing
Trisc FW initializes CBs, this we being done again in llks, removed
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Closing. Semaphore change ran into major issues w/ T3k tests, fixed in a separate branch, will pull those in isolation then rebase the rest of this work on that. |
Ticket
#4984
Problem description
Migration of sems and cb configs to ring buffer
What's changed
Move semaphores and CB configs to ring buffer.
Had to hack disable code in cq_dispatch due to code issues
Had to hack around race in llks (this code sped things up exposing a race, added a delay to compensate)
Checklist