Enable compiling on RISC-V CPU (#2925)

status-im · Dec 11, 2024 · 29decdf · 29decdf
1 parent ac59b18
commit 29decdf
Showing 1 changed file with 5 additions and 0 deletions.
diff --git a/config.nims b/config.nims
@@ -102,6 +102,11 @@ elif defined(macosx) and defined(arm64):
   # Apple's Clang can't handle "-march=native" on M1: https://github.com/status-im/nimbus-eth2/issues/2758
   switch("passC", "-mcpu=apple-a14")
   switch("passL", "-mcpu=apple-a14")
+elif defined(riscv64):
+  # riscv64 needs specification of ISA with extensions. 'gc' is widely supported 
+  # and seems to be the minimum extensions needed to build. 
+  switch("passC", "-march=rv64gc")
+  switch("passL", "-march=rv64gc")
 else:
   switch("passC", "-march=native")
   switch("passL", "-march=native")