Merge pull request #979 from slaclab/var-overlaps-corner-case

 test_block_overlap.py update

src/rogue/interfaces/memory/Block.cpp

@@ -148,7 +148,7 @@ uint64_t rim::Block::offset() {
 
 // Get full address of this Block
 uint64_t rim::Block::address() {
-    return (reqAddress() | offset_);
+    return (reqAddress() + offset_);
 }
 
 // Get size of this block in bytes.

src/rogue/interfaces/memory/Hub.cpp

@@ -64,7 +64,7 @@ uint64_t rim::Hub::getOffset() {
 
 //! Get address
 uint64_t rim::Hub::getAddress() {
-    return (reqAddress() | offset_);
+    return (reqAddress() + offset_);
 }
 
 //! Return id to requesting master
@@ -105,15 +105,15 @@ uint64_t rim::Hub::doAddress() {
     if (root_)
         return (0);
     else
-        return (reqAddress() | offset_);
+        return (reqAddress() + offset_);
 }
 
 //! Post a transaction. Master will call this method with the access attributes.
 void rim::Hub::doTransaction(rim::TransactionPtr tran) {
     uint32_t maxAccess = getSlave()->doMaxAccess();
 
     // Adjust address
-    tran->address_ |= offset_;
+    tran->address_ += offset_;
 
     // Split into smaller transactions if necessary
     if (tran->size() > maxAccess) {

tests/.gitignore

@@ -0,0 +1 @@
+*.yml

tests/test_block_overlap.py

@@ -13,6 +13,24 @@
 
 #rogue.Logging.setLevel(rogue.Logging.Debug)
 
+class SimpleVarDevice(pr.Device):
+    def __init__(self, **kwargs):
+        super().__init__(**kwargs)
+
+        self.add(pr.RemoteVariable(
+            name      = 'Var1',
+            offset    =  0x0,
+            bitSize   = 32,
+            bitOffset = 0,
+        ))
+
+        self.add(pr.RemoteVariable(
+            name      = 'Var2',
+            offset    =  0x4,
+            bitSize   = 32,
+            bitOffset = 0,
+        ))
+
 class BlockDevice(pr.Device):
     def __init__(self, **kwargs):
         super().__init__(**kwargs)
@@ -85,7 +103,12 @@ def __init__(self):
         self.addInterface(sim)
 
         self.add(BlockDevice(
-            offset     = 0,
+            offset     = 0x0000,
+            memBase    = sim,
+        ))
+
+        self.add(SimpleVarDevice(
+            offset     = 0xF034, # non-4kB aligned base offset
             memBase    = sim,
         ))