nix: Add support for riscv*gc

Signed-off-by: Nick Spinale <[email protected]>
seL4 · Jan 6, 2024 · 8b0fa91 · 8b0fa91
1 parent ce32f9d
commit 8b0fa91
Show file tree

Hide file tree

Showing 7 changed files with 86 additions and 40 deletions.
diff --git a/hacking/nix/default.nix b/hacking/nix/default.nix
@@ -17,6 +17,10 @@ let
 
 in
 
+# let
+#   defaultNixpkgsPath = ../../../x/nixpkgs;
+# in
+
 { nixpkgsPath ? defaultNixpkgsPath
 , nixpkgsFn ? import nixpkgsPath
 , lib ? import (nixpkgsPath + "/lib")
@@ -63,20 +67,64 @@ let
               config = "armv7l-unknown-linux-gnueabihf";
             };
           };
-          riscv64 = {
-            none = mkLeafWithGuard {
-              config = "riscv64-none-elf";
+          riscv64 = rec {
+            default = imac;
+            imac = {
+              none = mkLeafWithGuard (rec {
+                config = "riscv64-none-elf";
+                gcc = this.gccParams;
+                this = {
+                  rustTargetRiscVArch = "imac";
+                  gccParams = { arch = "rv64imac_zicsr_zifencei"; abi = "lp64"; };
+                };
+              });
             };
-            linux = mkLeafWithGuard {
-              config = "riscv64-unknown-linux-gnu";
+            # TODO
+            # Currently incompatible with the "cc" crate. Must do something like
+            # https://github.com/rust-lang/cc-rs/pull/460 (except for bare metal) or
+            # https://github.com/rust-lang/cc-rs/pull/796.
+            # TODO
+            # Will require KernelRiscvExtD in sel4test.
+            gc = {
+              none = mkLeafWithGuard (rec {
+                config = "riscv64-none-elf";
+                gcc = {}; # equivalent to default, omitting means we can use cached binary
+                this = {
+                  rustTargetRiscVArch = "gc";
+                  gccParams = { arch = "rv64gc"; abi = "lp64d"; };
+                };
+              });
+              linux = mkLeafWithGuard {
+                config = "riscv64-unknown-linux-gnu";
+              };
             };
           };
-          riscv32 = {
-            none = mkLeafWithGuard {
-              config = "riscv32-none-elf";
+          riscv32 = rec {
+            default = imac;
+            imac = {
+              none = mkLeafWithGuard (rec {
+                config = "riscv32-none-elf";
+                gcc = this.gccParams;
+                this = {
+                  rustTargetRiscVArch = "imac";
+                  gccParams = { arch = "rv32imac_zicsr_zifencei"; abi = "ilp32"; };
+                };
+              });
             };
-            linux = mkLeafWithGuard {
-              config = "riscv32-unknown-linux-gnu";
+            # TODO (see note for riscv64.gc)
+            # TODO will require KernelRiscvExtF in sel4test
+            imafc = {
+              none = mkLeafWithGuard (rec {
+                config = "riscv32-none-elf";
+                gcc = {}; # equivalent to default, omitting means we can use cached binary
+                this = {
+                  rustTargetRiscVArch = "imafc";
+                  gccParams = { arch = "rv64imafc_zicsr_zifencei"; abi = "ilp32f"; };
+                };
+              });
+              linux = mkLeafWithGuard {
+                config = "riscv32-unknown-linux-gnu";
+              };
             };
           };
           x86_64 = {

diff --git a/hacking/nix/overlay/default.nix b/hacking/nix/overlay/default.nix
@@ -35,9 +35,4 @@ assert !(super ? scopeName);
     (callPackage ./python-overrides.nix {})
   ];
 
-  # HACK: something wrong with multilib for riscv beyond gcc11 in nixpkgs
-  gccMultiStdenvGeneric = overrideCC stdenv (buildPackages.wrapCC (gcc11Stdenv.cc.cc.override {
-    enableMultilib = true;
-  }));
-
 }
diff --git a/hacking/nix/scope/default.nix b/hacking/nix/scope/default.nix
@@ -76,8 +76,8 @@ superCallPackage ../rust-utils {} self //
   rustTargetArchName = {
     aarch64 = "aarch64";
     aarch32 = "armv7a";
-    riscv64 = "riscv64imac";
-    riscv32 = "riscv32imac";
+    riscv64 = "riscv64${hostPlatform.this.rustTargetRiscVArch}";
+    riscv32 = "riscv32${hostPlatform.this.rustTargetRiscVArch}";
     x86_64 = "x86_64";
     ia32 = "i686";
   }."${seL4Arch}";
@@ -92,8 +92,8 @@ superCallPackage ../rust-utils {} self //
   bareMetalRustTargetInfo = mkBuiltinRustTargetInfo {
     aarch64 = "aarch64-unknown-none";
     aarch32 = "armv7a-none-eabi"; # armv7a-none-eabihf?
-    riscv64 = "riscv64imac-unknown-none-elf"; # gc?
-    riscv32 = "riscv32imac-unknown-none-elf"; # gc?
+    riscv64 = "riscv64${hostPlatform.this.rustTargetRiscVArch}-unknown-none-elf";
+    riscv32 = "riscv32${hostPlatform.this.rustTargetRiscVArch}-unknown-none-elf";
     x86_64 = "x86_64-unknown-none";
     ia32 = "i686-unknown-linux-gnu"; # HACK
   }."${seL4Arch}";

diff --git a/hacking/nix/scope/sel4test/default.nix b/hacking/nix/scope/sel4test/default.nix
@@ -13,7 +13,6 @@
 , python3Packages
 , qemuForSeL4
 , git
-, gccMultiStdenvGeneric
 , sources
 , crateUtils
 , defaultRustToolchain
@@ -39,10 +38,6 @@
 
 with lib;
 
-let
-  thisStdenv = if hostPlatform.isRiscV then gccMultiStdenvGeneric else stdenv;
-in
-
 let
   rustToolchain = defaultRustToolchain;
   rustTargetInfo = bareMetalRustTargetInfo;
@@ -51,14 +46,15 @@ let
     let
       bool = v: if v then "TRUE" else "FALSE";
     in [
-      "-DCROSS_COMPILER_PREFIX=${thisStdenv.cc.targetPrefix}"
+      "-DCROSS_COMPILER_PREFIX=${stdenv.cc.targetPrefix}"
       "-DKernelSel4Arch=${seL4Arch}"
       "-DMCS=${bool mcs}"
       "-DSMP=${bool smp}"
       "-DSIMULATION=TRUE"
       "-DLibSel4UseRust=${bool rust}"
       "-DLibSel4TestPrinterRegex='${filter}'"
     ] ++ lib.optionals rust [
+      "-DHACK_RUST_TARGET=${rustTargetInfo.name}"
       "-DHACK_CARGO_MANIFEST_PATH=${workspace}/Cargo.toml"
       "-DHACK_CARGO_CONFIG=${cargoConfig}"
       "-DHACK_CARGO_NO_BUILD_SYSROOT=TRUE"
@@ -67,6 +63,8 @@ let
       "-DPLATFORM=pc99"
     ] ++ lib.optionals hostPlatform.isRiscV [
       "-DPLATFORM=spike"
+      "-DOPENSBI_PLAT_ISA=${hostPlatform.this.gccParams.arch}"
+      "-DOPENSBI_PLAT_ABI=${hostPlatform.this.gccParams.abi}"
     ] ++ lib.optionals hostPlatform.isAarch [
       "-DPLATFORM=qemu-arm-virt"
       "-DARM_HYP=${bool virtualization}"
@@ -129,7 +127,7 @@ let
     compilerBuiltinsWeakIntrinsics = true;
   };
 
-  tests = thisStdenv.mkDerivation {
+  tests = stdenv.mkDerivation {
     name = "sel4test";
 
     src = fetchRepoProject {

diff --git a/hacking/nix/scope/sources.nix b/hacking/nix/scope/sources.nix
@@ -35,7 +35,8 @@ let
   srcRoot = ../../..;
 
   # TODO
-  localRoot = srcRoot + "/tmp/src";
+  # localRoot = srcRoot + "/tmp/src";
+  localRoot = srcRoot + "/../x";
 
   mkKeepRef = rev: "refs/tags/keep/${builtins.substring 0 32 rev}";
 
@@ -60,7 +61,7 @@ in rec {
 
     rust-sel4test = fetchGit {
       url = "https://github.com/coliasgroup/seL4.git";
-      rev = "b31b459876e01008336394bfa90388d8729ff5f5"; # rust-sel4test
+      rev = "85e36760bd158cf12a170450685eb7b0b05d2076"; # rust-sel4test
       local = localRoot + "/seL4";
     };
   };

diff --git a/hacking/nix/top-level/default.nix b/hacking/nix/top-level/default.nix
@@ -17,16 +17,16 @@ in {
   worldsForEverythingInstances = [
     pkgs.host.aarch64.none.this.worlds.default
     pkgs.host.aarch64.none.this.worlds.qemu-arm-virt.microkit
-    pkgs.host.riscv64.none.this.worlds.default
-    pkgs.host.riscv32.none.this.worlds.default
+    pkgs.host.riscv64.default.none.this.worlds.default
+    pkgs.host.riscv32.default.none.this.worlds.default
     pkgs.host.x86_64.none.this.worlds.default
   ];
 
   sel4testInstances = (lib.mapAttrs (k: v: v.this.sel4test.automate) {
     aarch64 = pkgs.host.aarch64.none;
     aarch32 = pkgs.host.aarch32.none;
-    riscv64 = pkgs.host.riscv64.none;
-    riscv32 = pkgs.host.riscv32.none;
+    riscv64 = pkgs.host.riscv64.default.none;
+    riscv32 = pkgs.host.riscv32.default.none;
     # TODO figure out why none doesn't build
     x86_64 = pkgs.host.x86_64.linux;
     ia32 = pkgs.host.ia32.linux; # no rust support yet
@@ -35,7 +35,6 @@ in {
   sel4testInstancesList = lib.attrValues sel4testInstances;
 
   prerequisites = aggregate "prerequisites" [
-    pkgs.host.riscv64.none.gccMultiStdenvGeneric
     pkgs.build.this.qemuForSeL4
     pkgs.build.this.capdl-tool
     pkgs.build.this.vendoredTopLevelLockfile.vendoredSourcesDirectory
@@ -55,6 +54,11 @@ in {
     pkgs.host.aarch32.none.this.worlds.default.seL4
     pkgs.host.ia32.none.this.worlds.default.seL4
 
+    pkgs.host.riscv64.imac.none.stdenv
+    pkgs.host.riscv64.gc.none.stdenv
+    pkgs.host.riscv32.imac.none.stdenv
+    pkgs.host.riscv32.imafc.none.stdenv
+
     example
     example-rpi4-b-4gb
   ];
@@ -138,11 +142,11 @@ in {
 
   worlds = lib.fix (self: {
     default = self.aarch64.default;
-  } // lib.listToAttrs
-    (lib.forEach
-      [ "aarch64" "aarch32" "riscv64" "riscv32" "x86_64" "i386" ]
-      (arch: lib.nameValuePair arch (pkgs.host.${arch}.none.this.worlds)))
-  );
+  } // lib.mapAttrs (_: arch: arch.none.this.worlds) {
+    inherit (pkgs.host) aarch64 aarch32 x86_64 i386;
+    riscv64 = pkgs.host.riscv64.default;
+    riscv32 = pkgs.host.riscv32.default;
+  });
 
   example = worlds.default.instances.examples.root-task.example-root-task.simulate;
 

diff --git a/hacking/nix/top-level/docs/default.nix b/hacking/nix/top-level/docs/default.nix
@@ -39,12 +39,12 @@ let
         minimal = true;
       }
       { id = "riscv64-root-task";
-        world = pkgs.host.riscv64.none.this.worlds.default;
+        world = pkgs.host.riscv64.default.none.this.worlds.default;
         runtime = "sel4-root-task";
         minimal = false;
       }
       { id = "riscv32-root-task";
-        world = pkgs.host.riscv32.none.this.worlds.default;
+        world = pkgs.host.riscv32.default.none.this.worlds.default;
         runtime = "sel4-root-task";
         minimal = false;
       }