Skip to content

Commit

Permalink
mediatek: add support for TP-Link TL-XTR8488
Browse files Browse the repository at this point in the history 
Hardware specification:
  SoC: MediaTek MT7986A 4x A53
  Flash: ESMT F50L1G41LB 128MB
  RAM: MT40A512M16TB-062ER 1GB
  Ethernet: 2x 2.5G, 4x 1G Lan
  WiFi1: MT7976GN 2.4GHz 4T4R
  WiFi2: MT7976AN 5.2GHz 4T4R
  WiFi3: MT7915AN 5.8GHz 4T4R
  Button: Reset, WPS, Turbo
  USB: 1 x USB 3.0
  Power: DC 12V 5A

Flash instructions:
  1. Execute the following operation to open nc shell:
     https://openwrt.org/inbox/toh/tp-link/xdr-6086#rooting
  2. Replace the stock bootloader to OpenWrt's:
     dd bs=131072 conv=sync of=/dev/mtdblock9 if=/tmp/xxx-preloader.bin
     dd bs=131072 conv=sync of=/dev/mtdblock9 seek=28 if=/tmp/xxx-bl31-uboot.fip
  3. Connect to your PC via the Gigabit port of the router,
     set a static ip on the ethernet interface of your PC.
  4. Download the initramfs image, and restart the router,
     waiting for tftp recovery to complete.
  5. After openwrt boots up, perform sysupgrade.

Signed-off-by: Chukun Pan <[email protected]>
Link: openwrt#15930
Signed-off-by: Hauke Mehrtens <[email protected]>
  • Loading branch information
@aiamadeus @hauke
aiamadeus authored and hauke committed Jul 25, 2024
1 parent ee382f6 commit 73832e1
Show file tree
Hide file tree
Showing 5 changed files with 406 additions and 1 deletion.
390 changes: 390 additions & 0 deletions target/linux/mediatek/dts/mt7986a-tplink-tl-xtr8488.dts
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,390 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

#include "mt7986a.dtsi"

/ {
model = "TP-Link TL-XTR8488";
compatible = "tplink,tl-xtr8488", "mediatek,mt7986a";

aliases {
serial0 = &uart0;
label-mac-device = &gmac0;
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_red;
};

chosen {
bootargs = "root=/dev/fit0 rootwait";
rootdisk = <&ubi_rootdisk>;
stdout-path = "serial0:115200n8";
};

memory {
reg = <0 0x40000000 0 0x40000000>;
};

reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};

reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "fixed-5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};

keys {
compatible = "gpio-keys";

reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 15 GPIO_ACTIVE_LOW>;
};

wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 16 GPIO_ACTIVE_LOW>;
};

turbo {
label = "turbo";
linux,code = <BTN_1>;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
};

leds {
compatible = "gpio-leds";

led_status_red: status-red {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
};

led_status_green: status-green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
};

turbo {
label = "green:turbo";
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 12 GPIO_ACTIVE_LOW>;
};
};
};

&crypto {
status = "okay";
};

&eth {
status = "okay";

gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";

nvmem-cells = <&macaddr_config_1c 0>;
nvmem-cell-names = "mac-address";

fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};

gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-handle = <&phy7>;
phy-mode = "2500base-x";

nvmem-cells = <&macaddr_config_1c 1>;
nvmem-cell-names = "mac-address";
};

mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};

&mdio {
phy5: phy@5 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <5>;
realtek,aldps-enable;
};

phy7: phy@7 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <7>;
realtek,aldps-enable;
};

switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
};
};

&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
label = "lan1";
};

port@1 {
reg = <1>;
label = "lan2";
};

port@2 {
reg = <2>;
label = "lan3";
};

port@3 {
reg = <3>;
label = "lan4";
};

port@5 {
reg = <5>;
label = "lan5";
phy-handle = <&phy5>;
phy-mode = "2500base-x";
};

port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";

fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};

&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_flash_pins>;
status = "okay";

flash@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;

spi-max-frequency = <20000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;

partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

partition@0 {
label = "bl2";
reg = <0x000000 0x0100000>;
read-only;
};

partition@100000 {
label = "config";
reg = <0x100000 0x0040000>;
read-only;

nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;

macaddr_config_1c: macaddr@1c {
compatible = "mac-base";
reg = <0x1c 0x6>;
#nvmem-cell-cells = <1>;
};
};
};

partition@140000 {
label = "factory";
reg = <0x140000 0x0040000>;
read-only;

nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;

eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};

eeprom_factory_1000: eeprom@1000 {
reg = <0x1000 0xe00>;
};
};
};

partition@180000 {
label = "reserved";
reg = <0x180000 0x0200000>;
read-only;
};

partition@380000 {
label = "fip";
reg = <0x380000 0x0200000>;
read-only;
};

partition@580000 {
compatible = "linux,ubi";
reg = <0x580000 0x7800000>;
label = "ubi";

volumes {
ubi_rootdisk: ubi-volume-fit {
volname = "fit";
};
};
};
};
};
};

&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
status = "okay";

pcie@0,0 {
reg = <0x0000 0 0 0 0>;

wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5470000 5875000>;

nvmem-cells = <&eeprom_factory_1000>, <&macaddr_config_1c 3>;
nvmem-cell-names = "eeprom", "mac-address";
};
};
};

&pcie_phy {
status = "okay";
};

&pio {
pcie_pins: pcie-pins {
mux {
function = "pcie";
groups = "pcie_clk", "pcie_wake", "pcie_pereset";
};
};

spi_flash_pins: spi-flash-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
};
};

wf_2g_5g_pins: wf_2g_5g-pins {
mux {
function = "wifi";
groups = "wf_2g", "wf_5g";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
};
};
};

&ssusb {
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_5v>;
status = "okay";
};

&trng {
status = "okay";
};

&uart0 {
status = "okay";
};

&usb_phy {
status = "okay";
};

&watchdog {
status = "okay";
};

&wifi {
pinctrl-names = "default";
pinctrl-0 = <&wf_2g_5g_pins>;
ieee80211-freq-limit = <2400000 2500000>, <5170000 5350000>;
nvmem-cells = <&eeprom_factory_0>, <&macaddr_config_1c 2>;
nvmem-cell-names = "eeprom", "mac-address";
status = "okay";
};
Loading

0 comments on commit 73832e1

Please sign in to comment.