Merge branch 'main' into safer-vi

luma_core/src/ipc.rs

@@ -1,26 +1,26 @@
-use core::ptr;
-
 //bits 0..=31 = physical address of ipc request
-const HW_IPC_PPCMSG: *mut u32 = ptr::without_provenance_mut(0xCD00_0000);
+const HW_IPC_PPCMSG: *mut u32 = 0xCD00_0000 as *mut u32;
+
 
 //bit 0 = X1 | Execute IPC request
 //bit 1 = Y2 | Acknowledge IPC request
 //bit 2 = Y1 | IPC request reply available
 //bit 3 = X2 | Relaunch IPC
 //bit 4 = IY1 | IPC request reply send out IPC interrupt
 //bit 5 = IY2 | IPC request acknowledge sends out IPC interrupt
-const HW_IPC_PPCCTRL: *mut u32 = ptr::without_provenance_mut(0xCD00_0004);
+
+const HW_IPC_PPCCTRL: *mut u32 = 0xCD00_0004 as *mut u32;
 
 //bits 0..=31 = physical address of ipc request
-const HW_IPC_ARMMSG: *mut u32 = ptr::without_provenance_mut(0xCD00_0008);
+const HW_IPC_ARMMSG: *mut u32 = 0xCD00_0008 as *mut u32;
 
 //bit 0 = Y1 | IPC request reply available
 //bit 1 = X2 | Relauch IPC
 //bit 2 = X1 | Execute IPC request
 //bit 3 = Y2 | Acknowledge IPC request
 //bit 4 = IX1 | Execute ipc request send IPC interrupt
 //bit 5 = IX2 | Relaunch IPC sends IPC interrupt
-const HW_IPC_ARMCTRL: *mut u32 = ptr::without_provenance_mut(0xCD00_000C);
+const HW_IPC_ARMCTRL: *mut u32 = 0xCD00_000C as *mut u32;
 
 /// IPC Message Address (for BOTH ARM AND PPC)
 #[repr(transparent)]