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Resolution increase, timer changes, gyro overflow fix
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@rs2k
rs2k committed Apr 17, 2016
1 parent 6ae0fac commit 171a8d0
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Showing 12 changed files with 9,697 additions and 8,598 deletions.
2 changes: 1 addition & 1 deletion Makefile
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Expand Up @@ -905,7 +905,7 @@ OPTIMIZE = -O0
LTO_FLAGS = $(OPTIMIZE)
else
ifeq ($(TARGET),$(filter $(TARGET),SPARKY2 SPARKY2_OPBL))
OPTIMIZE = -O0
OPTIMIZE = -O2
else ifeq ($(TARGET),$(filter $(TARGET),REVO REVO_OPBL REVONANO REVONANO_OPBL ALIENFLIGHTF4 BLUEJAYF4 VRCORE))
OPTIMIZE = -O2
else
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16,917 changes: 8,492 additions & 8,425 deletions obj/raceflight_VRCORE.hex
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2 changes: 1 addition & 1 deletion src/main/config/config.c
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Expand Up @@ -439,7 +439,7 @@ static void resetConf(void)
masterConfig.acc_hardware = ACC_DEFAULT; // default/autodetect
masterConfig.max_angle_inclination = 700; // 70 degrees
masterConfig.yaw_control_direction = 1;
masterConfig.gyroConfig.gyroMovementCalibrationThreshold = 32;
masterConfig.gyroConfig.gyroMovementCalibrationThreshold = 16;

// xxx_hardware: 0:default/autodetect, 1: disable
masterConfig.mag_hardware = 1;
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10 changes: 7 additions & 3 deletions src/main/drivers/pwm_mapping.h
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Expand Up @@ -38,9 +38,13 @@
#define PWM_TIMER_MHZ 1

//these three have to be the same because of the ppmAvoidPWMTimerClash functions
#define ONESHOT125_TIMER_MHZ 12
#define MULTISHOT_TIMER_MHZ 12
#define PWM_BRUSHED_TIMER_MHZ 12
#define ONESHOT125_TIMER_MHZ 8
#if defined(STM32F40_41xxx) || defined(STM32F411xE)
#define MULTISHOT_TIMER_MHZ 48
#else
#define MULTISHOT_TIMER_MHZ 24
#endif
#define PWM_BRUSHED_TIMER_MHZ 8


typedef struct sonarGPIOConfig_s {
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12 changes: 7 additions & 5 deletions src/main/drivers/pwm_output.c
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Expand Up @@ -127,7 +127,7 @@ static pwmOutputPort_t *pwmOutConfig(const timerHardware_t *timerHardware, uint8

static void pwmWriteBrushed(uint8_t index, uint16_t value)
{
*motors[index]->ccr = (uint16_t)((float)((value - 1000) * motors[index]->period / 1000)*1.5f); //Expecting 8MHz timer, multiply by 1.5 to scale to 12MHz timer
*motors[index]->ccr = (uint16_t)((float)((value - 1000) * motors[index]->period / 1000));
}

static void pwmWriteStandard(uint8_t index, uint16_t value)
Expand All @@ -137,14 +137,16 @@ static void pwmWriteStandard(uint8_t index, uint16_t value)

static void pwmWriteOneshot(uint8_t index, uint16_t value)
{
//value = value >> 2;
//value = value << 2;
*motors[index]->ccr = (uint16_t)((float)value*1.5f); //Expecting 8MHz timer, multiply by 1.5 to scale to 12MHz timer
*motors[index]->ccr = (uint16_t)((float)value);
}

static void pwmWriteMultiShot(uint8_t index, uint16_t value)
{
*motors[index]->ccr = (uint16_t)((float)(value-1000) / 4.1666f)+ 60;
#if defined(STM32F40_41xxx) || defined(STM32F411xE)
*motors[index]->ccr = (uint16_t)((float)(value-1000) / 1.04166f)+ 240;
#else
*motors[index]->ccr = (uint16_t)((float)(value-1000) / 2.08333f)+ 120;
#endif
}

void pwmWriteMotor(uint8_t index, uint16_t value)
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6 changes: 0 additions & 6 deletions src/main/drivers/system_stm32f4xx.c
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Expand Up @@ -41,12 +41,6 @@ void systemReset(void)

resetGyro();

#if defined(OPBL) && !defined(REVONANO)
*((uint32_t *)0x2001FFFC) = 0x08020000; // 128KB SRAM STM32F4XX
#elif defined(OPBL)
*((uint32_t *)0x2001FFFC) = 0x08010000; // 128KB SRAM STM32F4XX
#endif

__disable_irq();
NVIC_SystemReset();
}
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6 changes: 3 additions & 3 deletions src/main/target/ALIENFLIGHTF4/system_stm32f4xx.c
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Expand Up @@ -383,7 +383,7 @@ uint32_t hse_value = HSE_VALUE;
#endif /* STM32F40_41xxx || STM32F427_437xx || STM32F429_439xx || STM32F401xx || STM32F469_479xx */

/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */
#define PLL_Q 7
#define PLL_Q 8

#if defined(STM32F446xx)
/* PLL division factor for I2S, SAI, SYSTEM and SPDIF: Clock = PLL_VCO / PLLR */
Expand All @@ -397,7 +397,7 @@ uint32_t hse_value = HSE_VALUE;
#endif /* STM32F427_437x || STM32F429_439xx || STM32F446xx || STM32F469_479xx */

#if defined (STM32F40_41xxx)
#define PLL_N 336
#define PLL_N 384
/* SYSCLK = PLL_VCO / PLL_P */
#define PLL_P 2
#endif /* STM32F40_41xxx */
Expand Down Expand Up @@ -433,7 +433,7 @@ uint32_t hse_value = HSE_VALUE;
*/

#if defined(STM32F40_41xxx)
uint32_t SystemCoreClock = 168000000;
uint32_t SystemCoreClock = 192000000;
#endif /* STM32F40_41xxx */

#if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx)
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1,050 changes: 1,041 additions & 9 deletions src/main/target/BLUEJAYF4/system_stm32f4xx.c
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6 changes: 3 additions & 3 deletions src/main/target/REVO/system_stm32f4xx.c
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Expand Up @@ -383,7 +383,7 @@ uint32_t hse_value = HSE_VALUE;
#endif /* STM32F40_41xxx || STM32F427_437xx || STM32F429_439xx || STM32F401xx || STM32F469_479xx */

/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */
#define PLL_Q 7
#define PLL_Q 8

#if defined(STM32F446xx)
/* PLL division factor for I2S, SAI, SYSTEM and SPDIF: Clock = PLL_VCO / PLLR */
Expand All @@ -397,7 +397,7 @@ uint32_t hse_value = HSE_VALUE;
#endif /* STM32F427_437x || STM32F429_439xx || STM32F446xx || STM32F469_479xx */

#if defined (STM32F40_41xxx)
#define PLL_N 336
#define PLL_N 384
/* SYSCLK = PLL_VCO / PLL_P */
#define PLL_P 2
#endif /* STM32F40_41xxx */
Expand Down Expand Up @@ -433,7 +433,7 @@ uint32_t hse_value = HSE_VALUE;
*/

#if defined(STM32F40_41xxx)
uint32_t SystemCoreClock = 168000000;
uint32_t SystemCoreClock = 192000000;
#endif /* STM32F40_41xxx */

#if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx)
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8 changes: 4 additions & 4 deletions src/main/target/SPARKY2/system_stm32f4xx.c
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Expand Up @@ -370,7 +370,7 @@ uint32_t hse_value = HSE_VALUE;
/************************* PLL Parameters *************************************/
#if defined(STM32F40_41xxx) || defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F401xx) || defined(STM32F469_479xx)
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
#define PLL_M 10
#define PLL_M 8
#elif defined (STM32F446xx)
#define PLL_M 8
#elif defined (STM32F410xx) || defined (STM32F411xE)
Expand All @@ -383,7 +383,7 @@ uint32_t hse_value = HSE_VALUE;
#endif /* STM32F40_41xxx || STM32F427_437xx || STM32F429_439xx || STM32F401xx || STM32F469_479xx */

/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */
#define PLL_Q 7
#define PLL_Q 8

#if defined(STM32F446xx)
/* PLL division factor for I2S, SAI, SYSTEM and SPDIF: Clock = PLL_VCO / PLLR */
Expand All @@ -397,7 +397,7 @@ uint32_t hse_value = HSE_VALUE;
#endif /* STM32F427_437x || STM32F429_439xx || STM32F446xx || STM32F469_479xx */

#if defined (STM32F40_41xxx)
#define PLL_N 420
#define PLL_N 384
/* SYSCLK = PLL_VCO / PLL_P */
#define PLL_P 2
#endif /* STM32F40_41xxx */
Expand Down Expand Up @@ -433,7 +433,7 @@ uint32_t hse_value = HSE_VALUE;
*/

#if defined(STM32F40_41xxx)
uint32_t SystemCoreClock = 168000000;
uint32_t SystemCoreClock = 192000000;
#endif /* STM32F40_41xxx */

#if defined(STM32F427_437xx) || defined(STM32F429_439xx) || defined(STM32F446xx) || defined(STM32F469_479xx)
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