Merge branch 'main' of github.com:TinyTapeout/tt02-submission-templat…

…e into main
rolfmobile99 · Oct 20, 2022 · 90fdbd2 · 90fdbd2
2 parents 5dd83a9 + f434021
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diff --git a/src/template.v b/src/template.v
@@ -0,0 +1,11 @@
+// TinyTapeout02: Verilog Template
+// Remember to include your top module name in the info.yaml file
+`default_netname none
+
+module githubusername_top( //prepend your github username
+	input  [7:0] io_in,    //leave the port names unchanged
+	output [7:0] io_out);
+
+	//****Your Design Here****
+
+endmodule
diff --git a/src/template_tb.v b/src/template_tb.v
@@ -0,0 +1,19 @@
+module template_tb ();
+    reg  [7:0] io_in;
+    wire [7:0] io_out;
+
+    initial begin
+        $monitor("%8b  %8b", io_in, io_out);
+        io_in = 8'b00000000;
+        #1 io_in = 8'b00000001;
+        #1 io_in = 8'b00000000;
+        #1 io_in = 8'b00000010;
+        #1 io_in = 8'b00000010;
+        #1 io_in = 8'b00000011;
+        #1 io_in = 8'b00000010;
+        #1 io_in = 8'b00000000;
+    end
+
+    githubusername_top dut(.io_i(io_in),
+                   .io_o(io_out));
+endmodule