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attempt at cleaning up CLIC parameter definitions #331

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attempt at cleaning up CLIC parameter definitions #331

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68 changes: 44 additions & 24 deletions clic.adoc
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Expand Up @@ -1896,38 +1896,57 @@ When NVBITS is 1, smclicshv extension is implemented.
=== CLICINFO Parameters

The NUM_INTERRUPT 13-bit parameter specifies the actual number of maximum interrupt
inputs supported in this implementation.
inputs supported in this implementation from 1 to 4096.

The VERSION 8-bit parameter specifies the implementation version of CLIC. The upper
4-bit specifies the architecture version, and the lower 4-bit specifies
the implementation version.

The CLICINTCTLBITS 4-bit parameter specifies how many hardware bits are actually
implemented in the `clicintctl` registers, with 0 {le} `CLICINTCTLBITS` {le} 8.
The implemented bits are kept left-justified in the most-significant bits of
each 8-bit `clicintctl[__i__]` register, with the lower unimplemented bits
The CLICINTCTLBITS 4-bit parameter specifies how many bits software can
modify in the `clicintctl` registers, with 0 {le} `CLICINTCTLBITS` {le} 8.
The modifiable bits are kept left-justified in the most-significant bits of
each 8-bit `clicintctl[__i__]` register, with the lower static bits
treated as hardwired to 1.

The NUM_TRIGGER 6-bit parameter specifies the number of maximum interrupt
triggers supported in this implementation. Valid values are 0 to 32.

=== CLIC LEVEL MAX and MIN
Some implementations may choose to implement less than 2 modifiable bits in
`clicintattr[__i__]` and instead compare `clicintctl[__i__]` to min and max level values of
to determine the interrupt privilege mode and `clicintattr[__i__]` WARL value.
These parameters below provide that flexibility.
For other implementations that implement modifiable `clicintattr[__i__]` bits,
xCLICLEVELMAX will be 255 and xCLICLEVELMIN will be 0.

[source]
----
CLICCFGMBITS 0-2 Number of bits modifiable in `clicintattr[__i__]`
MCLICLEVELMAX 255 Max m-mode interrupt level value
MCLICLEVELMIN 0-255 Min m-mode interrupt level value
SCLICLEVELMAX 255 Max s-mode interrupt level value
if ssclic extension is implemented
SCLICLEVELMIN 0-255 Min s-mode interrupt level value
if ssclic extension is implemented
UCLICLEVELMAX 255 Max u-mode interrupt level value
if suclic extension is implemented
UCLICLEVELMIN 0-255 Min u-mode interrupt level value
if suclic extension is implemented
----
=== Additional CLIC Parameters

[source]
----
Name Value Range Description
CLICANDBASIC 0-1 Implements CLINT mode also?
CLICPRIVMODES 1-3 Number privilege modes: 1=M, 2=M/U,
3=M/S/U
CLICLEVELS 2-256 Number of interrupt levels including 0
NUM_INTERRUPT 2-4096 Always has MSIP, MTIP
CLICMAXID 12-4095 Largest interrupt ID

INTTHRESHBITS 1-8 Number of bits implemented in {intthresh}.th
CLICCFGMBITS 0-ceil(lg2(CLICPRIVMODES)) Number of bits implemented for
cliccfg.nmbits
CLICCFGLBITS 0-ceil(lg2(CLICLEVELS)) Number of bits implemented for
cliccfg.nlbits
CLICANDBASIC 0-1 1 if CLINT mode is also implemented

CLICUMODEINT 0-1 suclic extension implemented
CLICSMODEINT 0-1 ssclic extension implemented

CLICMAXID 1-4095 Largest interrupt ID

INTTHRESHBITS 1-8 Number of MSB bits modifiable in {intthresh}.th

CLICMTVECALIGN >= 6 Number of hardwired-zero least
significant bits in mtvec address.
----
Expand Down Expand Up @@ -1999,16 +2018,17 @@ Detailed explanation for each field are described in the following sections.
[source]
----
Interrupt Mode Table
Interrupt WARL values for
priv-modes nmbits clicintattr[i].mode Interpretation
M 0 xx M-mode interrupt
M 0 11 M-mode interrupt

M/U 0 xx M-mode interrupt
M/U 1 0x U-mode interrupt
M/U 1 1x M-mode interrupt
M/U 0 11 M-mode interrupt
M/U 1 00 U-mode interrupt
M/U 1 11 M-mode interrupt

M/S/U 0 xx M-mode interrupt
M/S/U 1 0x S-mode interrupt
M/S/U 1 1x M-mode interrupt
M/S/U 0 11 M-mode interrupt
M/S/U 1 01 S-mode interrupt
M/S/U 1 11 M-mode interrupt
M/S/U 2 00 U-mode interrupt
M/S/U 2 01 S-mode interrupt
M/S/U 2 10 Reserved (or extended S-mode)
Expand Down