Updated and enabled the multiple vset test

riscv-software-src · Jul 19, 2024 · 5e19ee7 · 5e19ee7
1 parent 74cbd30
commit 5e19ee7
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Showing 3 changed files with 17 additions and 73 deletions.
diff --git a/test/core/vector/CMakeLists.txt b/test/core/vector/CMakeLists.txt
@@ -24,7 +24,7 @@ sparta_named_test(Vector_test_vsetivli      Vector_test big_core.out -c test_cor
 sparta_named_test(Vector_test_vsetvli       Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file vsetvli_vaddvv_e32m1ta.json)
 sparta_named_test(Vector_test_vsetvl        Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file vsetvl_vaddvv_e64m1ta.json)
 sparta_named_test(Vector_test_vsetivli_tail Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file vsetivli_vaddvv_tail_e8m8ta.json)
-#sparta_named_test(Vector_test_multiple_vset Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file multiple_vset.json)
+sparta_named_test(Vector_test_multiple_vset Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file multiple_vset.json)
 sparta_named_test(Vector_test_vmulvx        Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file vmulvx_e8m4.json)
 sparta_named_test(Vector_test_vmulvv        Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file vwmulvv_e8m4.json)
 sparta_named_test(Vector_test_vmseqvv       Vector_test big_core.out -c test_cores/test_big_core_full.yaml --input-file vmseqvv_e8m4.json)

diff --git a/test/core/vector/Vector_test.cpp b/test/core/vector/Vector_test.cpp
@@ -248,11 +248,16 @@ void runTests(int argc, char **argv)
 
         // Test Decode (last vset)
         decode_tester.test_waiting_on_vset(false);
-        decode_tester.test_lmul(1);
-        decode_tester.test_vl(128);
+        decode_tester.test_lmul(8);
+        decode_tester.test_vl(1024);
         decode_tester.test_vta(false);
-        decode_tester.test_sew(32);
-        decode_tester.test_vlmax(32);
+        decode_tester.test_sew(8);
+        decode_tester.test_vlmax(1024);
+
+        // Test Retire
+        rob_tester.test_num_insts_retired(4);
+        // vset + 4 vmul.vx uop + vset + 8 vadd.vv
+        rob_tester.test_num_uops_retired(14);
     }
     else if(input_file.find("vmulvx.json") != std::string::npos)
     {

diff --git a/test/core/vector/multiple_vset.json b/test/core/vector/multiple_vset.json
@@ -1,91 +1,30 @@
 [
-    {
-        "mnemonic": "vsetvl",
-        "rs1": 3,
-        "vtype": "0x18",
-        "rd": 1,
-        "vl": 512,
-        "vta": 1
-    },
-    {
-        "mnemonic": "vadd.vv",
-        "vs1": 10,
-        "vs2": 17,
-        "vd": 3
-    },
     {
         "mnemonic": "vsetvli",
         "rs1": 0,
-        "vtype": "0x10",
+        "vtype": "0x2",
         "rd": 1,
         "vl": 512,
         "vta": 1
     },
     {
         "mnemonic": "vadd.vv",
         "vs1": 10,
-        "vs2": 17,
-        "vd": 3
-    },
-    {
-        "mnemonic": "vsetvli",
-        "rs1": 2,
-        "vtype": "0x10",
-        "rd": 1,
-        "vl": 128,
-        "vta": 0
-    },
-    {
-        "mnemonic": "add",
-        "rs1": 1,
-        "rs2": 2,
-        "rd": 3
-    },
-    {
-        "mnemonic": "sw",
-        "rs2": 4,
-        "rs1": 3,
-        "imm": 5
-    },
-    {
-        "mnemonic": "lw",
-        "rs1": 3,
-        "rs2": 4,
-        "rd":  5,
-        "vaddr" : "0xdeadbeef"
-    },
-    {
-        "mnemonic": "vadd.vv",
-        "vs1": 1,
-        "vs2": 10,
-        "vd": 22
+        "vs2": 11,
+        "vd": 12
     },
     {
         "mnemonic": "vsetvli",
         "rs1": 2,
-        "vtype": "0x10",
-        "rd": 1,
-        "vl": 512,
-        "vta": 1
-    },
-    {
-        "mnemonic": "vadd.vv",
-        "vs1": 10,
-        "vs2": 17,
-        "vd": 3
-    },
-    {
-        "mnemonic": "vsetivli",
-        "rs1": 5,
+        "vtype": "0x3",
         "rd": 1,
-        "vtype": "0x2",
         "vl": 1024,
         "vta": 0
     },
     {
         "mnemonic": "vadd.vv",
-        "vs1": 10,
-        "vs2": 17,
-        "vd": 3
+        "vs1": 8,
+        "vs2": 16,
+        "vd": 24
     }
 ]