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Mattia Sinigaglia
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Jan 31, 2024
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -6,6 +6,7 @@ package: | |
| name: spatz | ||
| authors: | ||
| - "Matheus Cavalcante <[email protected]>" | ||
| - "Mattia Sinigaglia <[email protected]>" | ||
|
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||
| dependencies: | ||
| axi: { git: "https://github.com/pulp-platform/axi.git", version: =0.39.1-beta } | ||
|
|
@@ -18,9 +19,9 @@ dependencies: | |
| tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.11 } | ||
|
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| export_include_dirs: | ||
| - hw/ip/reqrsp_interface/include | ||
| - hw/ip/mem_interface/include | ||
| - hw/ip/snitch/include | ||
| - hw/ip/reqrsp_interface/include | ||
| - hw/ip/tcdm_interface/include | ||
|
|
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| sources: | ||
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@@ -54,128 +55,90 @@ sources: | |
| ## hw/ip/mem_interface ## | ||
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| - hw/ip/mem_interface/src/mem_wide_narrow_mux.sv | ||
|
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| ## hw/ip/tcdm_interface ## | ||
|
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| # Level 0 | ||
| - hw/ip/tcdm_interface/src/tcdm_interface.sv | ||
| # Level 1 | ||
| - hw/ip/tcdm_interface/src/axi_to_tcdm.sv | ||
| - hw/ip/tcdm_interface/src/reqrsp_to_tcdm.sv | ||
| - hw/ip/tcdm_interface/src/tcdm_mux.sv | ||
| - target: simulation | ||
| files: | ||
| - hw/ip/mem_interface/src/mem_test.sv | ||
| - hw/ip/tcdm_interface/src/tcdm_test.sv | ||
| - target: test | ||
| files: | ||
| # Level 0 | ||
| - hw/ip/mem_interface/test/mem_wide_narrow_mux_tb.sv | ||
| - hw/ip/tcdm_interface/test/reqrsp_to_tcdm_tb.sv | ||
| - hw/ip/tcdm_interface/test/tcdm_mux_tb.sv | ||
|
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||
| ## hw/ip/tcdm_interface ## | ||
| ## hw/ip/snitch ## | ||
|
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| # Level 0: | ||
| - hw/ip/snitch/src/snitch_pma_pkg.sv | ||
| - hw/ip/snitch/src/riscv_instr.sv | ||
| # Level 1: | ||
| - hw/ip/snitch/src/snitch_pkg.sv | ||
| # Level 2: | ||
| - hw/ip/snitch/src/snitch_regfile_ff.sv | ||
| # - hw/ip/snitch/src/snitch_regfile_fpga.sv | ||
| # - hw/ip/snitch/src/snitch_regfile_latch.sv | ||
| - hw/ip/snitch/src/snitch_lsu.sv | ||
| - hw/ip/snitch/src/snitch_l0_tlb.sv | ||
| # Level 1: | ||
| - target: not(disable_pmcs) | ||
| defines: | ||
| SNITCH_ENABLE_PERF: | ||
| files: | ||
| - hw/ip/snitch/src/snitch.sv | ||
| # Disable the performance monitoring counters to save area. | ||
| - target: disable_pmcs | ||
| files: | ||
| - hw/ip/snitch/src/snitch.sv | ||
|
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||
| - target: test | ||
| files: | ||
| - hw/ip/snitch/test/snitch_l0_tlb_tb.sv | ||
|
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||
| ## hw/ip/snitch_icache ## | ||
|
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||
| # Level 0: | ||
| - hw/ip/snitch_icache/src/snitch_icache_pkg.sv | ||
| # Level 1: | ||
| - hw/ip/snitch_icache/src/snitch_icache_l0.sv | ||
| - hw/ip/snitch_icache/src/snitch_icache_refill.sv | ||
| - hw/ip/snitch_icache/src/snitch_icache_lfsr.sv | ||
| - hw/ip/snitch_icache/src/snitch_icache_lookup.sv | ||
| # Level 2: | ||
| - hw/ip/snitch_icache/src/snitch_icache_handler.sv | ||
| # Level 3: | ||
| - hw/ip/snitch_icache/src/snitch_icache.sv | ||
| - target: test | ||
| files: | ||
| - hw/ip/snitch_icache/test/snitch_icache_l0_tb.sv | ||
|
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||
| ## hw/ip/snitch_test ## | ||
|
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||
| # Level 1: | ||
| - target: any(simulation, verilator) | ||
| files: | ||
| - hw/ip/snitch_test/src/tb_memory_regbus.sv | ||
| # Level 2 | ||
| - hw/ip/snitch_test/src/tb_memory_axi.sv | ||
| # Level 3: | ||
| - target: snitch_test | ||
| files: | ||
| - hw/ip/snitch_test/src/tb_bin.sv | ||
|
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||
| # # Level 0: | ||
| # - hw/ip/reqrsp_interface/src/reqrsp_pkg.sv | ||
| # # Level 1: | ||
| # - hw/ip/reqrsp_interface/src/reqrsp_intf.sv | ||
| # # Level 2: | ||
| # - hw/ip/reqrsp_interface/src/axi_to_reqrsp.sv | ||
| # - hw/ip/reqrsp_interface/src/reqrsp_cut.sv | ||
| # - hw/ip/reqrsp_interface/src/reqrsp_demux.sv | ||
| # - hw/ip/reqrsp_interface/src/reqrsp_iso.sv | ||
| # - hw/ip/reqrsp_interface/src/reqrsp_mux.sv | ||
| # - hw/ip/reqrsp_interface/src/reqrsp_to_axi.sv | ||
| # - target: simulation | ||
| # files: | ||
| # - hw/ip/reqrsp_interface/src/reqrsp_test.sv | ||
| # - target: test | ||
| # files: | ||
| # # Level 0 | ||
| # - hw/ip/reqrsp_interface/test/axi_to_reqrsp_tb.sv | ||
| # - hw/ip/reqrsp_interface/test/reqrsp_demux_tb.sv | ||
| # - hw/ip/reqrsp_interface/test/reqrsp_idempotent_tb.sv | ||
| # - hw/ip/reqrsp_interface/test/reqrsp_mux_tb.sv | ||
| # - hw/ip/reqrsp_interface/test/reqrsp_to_axi_tb.sv | ||
|
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||
| # ## hw/ip/mem_interface ## | ||
|
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||
| - hw/ip/mem_interface/src/mem_wide_narrow_mux.sv | ||
|
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| ## hw/ip/tcdm_interface ## | ||
|
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| # # Level 0 | ||
| # - hw/ip/tcdm_interface/src/tcdm_interface.sv | ||
| # # Level 1 | ||
| # - hw/ip/tcdm_interface/src/axi_to_tcdm.sv | ||
| # - hw/ip/tcdm_interface/src/reqrsp_to_tcdm.sv | ||
| # - hw/ip/tcdm_interface/src/tcdm_mux.sv | ||
| # - target: simulation | ||
| # files: | ||
| # - hw/ip/tcdm_interface/src/tcdm_test.sv | ||
| # - target: test | ||
| # files: | ||
| # # Level 0 | ||
| # - hw/ip/tcdm_interface/test/reqrsp_to_tcdm_tb.sv | ||
| # - hw/ip/tcdm_interface/test/tcdm_mux_tb.sv | ||
|
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| # Use Mempool snitch | ||
| # ## hw/ip/snitch ## | ||
|
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| # # Level 0: | ||
| # - hw/ip/snitch/src/snitch_pma_pkg.sv | ||
| # - hw/ip/snitch/src/riscv_instr.sv | ||
| # # Level 1: | ||
| # - hw/ip/snitch/src/snitch_pkg.sv | ||
| # # Level 2: | ||
| # - hw/ip/snitch/src/snitch_regfile_ff.sv | ||
| # # - hw/ip/snitch/src/snitch_regfile_fpga.sv | ||
| # # - hw/ip/snitch/src/snitch_regfile_latch.sv | ||
| # - hw/ip/snitch/src/snitch_lsu.sv | ||
| # - hw/ip/snitch/src/snitch_l0_tlb.sv | ||
| # # Level 1: | ||
| # - target: not(disable_pmcs) | ||
| # defines: | ||
| # SNITCH_ENABLE_PERF: | ||
| # files: | ||
| # - hw/ip/snitch/src/snitch.sv | ||
| # # Disable the performance monitoring counters to save area. | ||
| # - target: disable_pmcs | ||
| # files: | ||
| # - hw/ip/snitch/src/snitch.sv | ||
|
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||
| # - target: test | ||
| # files: | ||
| # - hw/ip/snitch/test/snitch_l0_tlb_tb.sv | ||
|
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| # ## hw/ip/snitch_icache ## | ||
|
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| # # Level 0: | ||
| # - hw/ip/snitch_icache/src/snitch_icache_pkg.sv | ||
| # # Level 1: | ||
| # - hw/ip/snitch_icache/src/snitch_icache_l0.sv | ||
| # - hw/ip/snitch_icache/src/snitch_icache_refill.sv | ||
| # - hw/ip/snitch_icache/src/snitch_icache_lfsr.sv | ||
| # - hw/ip/snitch_icache/src/snitch_icache_lookup.sv | ||
| # # Level 2: | ||
| # - hw/ip/snitch_icache/src/snitch_icache_handler.sv | ||
| # # Level 3: | ||
| # - hw/ip/snitch_icache/src/snitch_icache.sv | ||
| # - target: test | ||
| # files: | ||
| # - hw/ip/snitch_icache/test/snitch_icache_l0_tb.sv | ||
|
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| # ## hw/ip/snitch_test ## | ||
|
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| # # Level 1: | ||
| # - target: any(simulation, verilator) | ||
| # files: | ||
| # - hw/ip/snitch_test/src/tb_memory_regbus.sv | ||
| # # Level 2 | ||
| # - hw/ip/snitch_test/src/tb_memory_axi.sv | ||
| # # Level 3: | ||
| # - target: snitch_test | ||
| # files: | ||
| # - hw/ip/snitch_test/src/tb_bin.sv | ||
|
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| ## hw/ip/spatz ## | ||
| - target: spatz | ||
| files: | ||
| # Level 0 | ||
| - hw/ip/spatz/src/reorder_buffer.sv | ||
| - hw/ip/spatz/src/rvv_pkg.sv | ||
| # Level 1 | ||
| - hw/ip/spatz/src/generated/spatz_pkg.sv | ||
|
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| - hw/ip/spatz/src/spatz_serdiv.sv | ||
| # Level 2 | ||
| - hw/ip/spatz/src/spatz_decoder.sv | ||
|
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@@ -197,6 +160,7 @@ sources: | |
| files: | ||
| - hw/ip/spatz_cc/src/spatz_mempool_cc.sv | ||
|
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|
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| ## hw/ip/spatz_cc ## | ||
| - target: not(mempool) | ||
| files: | ||
|
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@@ -229,5 +193,5 @@ sources: | |
|
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| - target: spatz_test | ||
| files: | ||
| # Level 1 | ||
| - hw/system/spatz_cluster/tb/testharness.sv | ||
| # Level 1 | ||
| - hw/system/spatz_cluster/tb/testharness.sv | ||