hw/system: disable common-cells assertions for verilator

pulp-platform · Mar 8, 2024 · 74083c1 · 74083c1
1 parent 505f1b0
commit 74083c1
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/hw/system/spatz_cluster/Makefile b/hw/system/spatz_cluster/Makefile
@@ -158,7 +158,7 @@ lint: generate lint/tmp/files lint/sdc/func.sdc lint/script/lint.tcl
 
 lint/tmp/files: ${BENDER}
 	mkdir -p lint/tmp
-	${BENDER} script verilator -t rtl -t spatz > lint/tmp/files
+	${BENDER} script verilator -t rtl -t spatz --define COMMON_CELLS_ASSERTS_OFF > lint/tmp/files
 
 ######
 # SW #

diff --git a/util/Makefrag b/util/Makefrag
@@ -57,7 +57,7 @@ VLT_FLAGS    += -Wno-PINMISSING
 VLT_FLAGS    += -Wno-fatal
 VLT_FLAGS    += --unroll-count 1024
 VLT_FLAGS    += --timing
-VLT_BENDER   += -t rtl -t spatz -t spatz_test -t snitch_test
+VLT_BENDER   += -t rtl -t spatz -t spatz_test -t snitch_test --define COMMON_CELLS_ASSERTS_OFF
 VLT_SOURCES  := $(shell ${BENDER} script flist ${VLT_BENDER} | ${SED_SRCS})
 VLT_CFLAGS   += -std=c++17 -fcoroutines
 VLT_CFLAGS   += -I${VLT_BUILDDIR}/riscv-isa-sim -I${VLT_BUILDDIR} -I${VERILATOR_INSTALL_DIR}/share/verilator/include -I${VERILATOR_INSTALL_DIR}/share/verilator/include/vltstd -I${ROOT}/hw/ip/snitch_test/src