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occamy: Add one regbus interface per FLL (#362)
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colluca authored Mar 22, 2022
1 parent 7cf9a70 commit 012ae78
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Showing 11 changed files with 181 additions and 76 deletions.
5 changes: 4 additions & 1 deletion docs/ug/occamy_addrmap.md
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,10 @@ This is the current address map of occamy. Note that the Quadrants address map h
| BOOTROM | 128.0 KB | used | 0x0100\_0000 | 0x0101\_ffff |
| - | 15.9 MB | free | 0x0102\_0000 | 0x01ff\_ffff |
| SOC\_CTRL | 4.0 KB | used | 0x0200\_0000 | 0x0200\_0fff |
| CLK\_MGR | 4.0 KB | used | 0x0200\_1000 | 0x0200\_1fff |
| FLL\_SYSTEM | 1.0 KB | used | 0x0200\_1000 | 0x0200\_13ff |
| FLL\_PERIPH | 1.0 KB | used | 0x0200\_1400 | 0x0200\_17ff |
| FLL\_HBM2E | 1.0 KB | used | 0x0200\_1800 | 0x0200\_1bff |
| - | 1023.0 B | free | 0x0200\_1c00 | 0x0200\_1fff |
| UART | 4.0 KB | used | 0x0200\_2000 | 0x0200\_2fff |
| GPIO | 4.0 KB | used | 0x0200\_3000 | 0x0200\_3fff |
| I2C | 4.0 KB | used | 0x0200\_4000 | 0x0200\_4fff |
Expand Down
12 changes: 10 additions & 2 deletions hw/system/occamy/addrmap/addrmap.tex
Original file line number Diff line number Diff line change
Expand Up @@ -28,8 +28,16 @@

\bitbox[]{5}{\texttt{0x0200\_0000} \\ [0\baselineskip] \texttt{0x0200\_0fff}} &
\bitbox{14}{4.0 KB for SOC\_CTRL} \\
\bitbox[]{5}{\texttt{0x0200\_1000} \\ [0\baselineskip] \texttt{0x0200\_1fff}} &
\bitbox{14}{4.0 KB for CLK\_MGR} \\
\bitbox[]{5}{\texttt{0x0200\_1000} \\ [0\baselineskip] \texttt{0x0200\_13ff}} &
\bitbox{14}{1.0 KB for FLL\_SYSTEM} \\
\bitbox[]{5}{\texttt{0x0200\_1400} \\ [0\baselineskip] \texttt{0x0200\_17ff}} &
\bitbox{14}{1.0 KB for FLL\_PERIPH} \\
\bitbox[]{5}{\texttt{0x0200\_1800} \\ [0\baselineskip] \texttt{0x0200\_1bff}} &
\bitbox{14}{1.0 KB for FLL\_HBM2E} \\
\bytefieldsetup{bitheight=1.4\baselineskip}%
\bitbox[]{5}{} &
\bitbox{14}{1023.0 B EMPTY} \\ \bytefieldsetup{bitheight=2\baselineskip}%

\bitbox[]{5}{\texttt{0x0200\_2000} \\ [0\baselineskip] \texttt{0x0200\_2fff}} &
\bitbox{14}{4.0 KB for UART} \\
\bitbox[]{5}{\texttt{0x0200\_3000} \\ [0\baselineskip] \texttt{0x0200\_3fff}} &
Expand Down
14 changes: 12 additions & 2 deletions hw/system/occamy/src/occamy_cfg.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -232,9 +232,19 @@
length: 4096, // 4 kiB 0x1000
},
{
name: "clk_mgr",
name: "fll_system",
address: 33558528, // 0x0200_1000
length: 4096, // 4 kiB 0x1000
length: 1024, // 1 kiB 0x400
},
{
name: "fll_periph",
address: 33559552, // 0x0200_1400
length: 1024, // 1 kiB 0x400
},
{
name: "fll_hbm2e",
address: 33560576, // 0x0200_1800
length: 1024, // 1 kiB 0x400
},
{
name: "uart",
Expand Down
36 changes: 20 additions & 16 deletions hw/system/occamy/src/occamy_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -200,7 +200,9 @@ package occamy_pkg;
/// Outputs of the `soc_regbus_periph_xbar` crossbar.
typedef enum int {
SOC_REGBUS_PERIPH_XBAR_OUT_SOC_CTRL,
SOC_REGBUS_PERIPH_XBAR_OUT_CLK_MGR,
SOC_REGBUS_PERIPH_XBAR_OUT_FLL_SYSTEM,
SOC_REGBUS_PERIPH_XBAR_OUT_FLL_PERIPH,
SOC_REGBUS_PERIPH_XBAR_OUT_FLL_HBM2E,
SOC_REGBUS_PERIPH_XBAR_OUT_UART,
SOC_REGBUS_PERIPH_XBAR_OUT_GPIO,
SOC_REGBUS_PERIPH_XBAR_OUT_I2C,
Expand All @@ -218,22 +220,24 @@ package occamy_pkg;
} soc_regbus_periph_xbar_outputs_e;

/// Address map of the `soc_regbus_periph_xbar` crossbar.
localparam xbar_rule_48_t [14:0] SocRegbusPeriphXbarAddrmap = '{
localparam xbar_rule_48_t [16:0] SocRegbusPeriphXbarAddrmap = '{
'{ idx: 0, start_addr: 48'h02000000, end_addr: 48'h02001000 },
'{ idx: 1, start_addr: 48'h02001000, end_addr: 48'h02002000 },
'{ idx: 2, start_addr: 48'h02002000, end_addr: 48'h02003000 },
'{ idx: 3, start_addr: 48'h02003000, end_addr: 48'h02004000 },
'{ idx: 4, start_addr: 48'h02004000, end_addr: 48'h02005000 },
'{ idx: 5, start_addr: 48'h02005000, end_addr: 48'h02006000 },
'{ idx: 6, start_addr: 48'h02006000, end_addr: 48'h02007000 },
'{ idx: 7, start_addr: 48'h03000000, end_addr: 48'h03020000 },
'{ idx: 8, start_addr: 48'h05000000, end_addr: 48'h05020000 },
'{ idx: 9, start_addr: 48'h06000000, end_addr: 48'h06010000 },
'{ idx: 10, start_addr: 48'h07000000, end_addr: 48'h07010000 },
'{ idx: 11, start_addr: 48'h0c000000, end_addr: 48'h10000000 },
'{ idx: 12, start_addr: 48'h01000000, end_addr: 48'h01020000 },
'{ idx: 13, start_addr: 48'h04000000, end_addr: 48'h04100000 },
'{ idx: 14, start_addr: 48'h08000000, end_addr: 48'h0a810000 }
'{ idx: 1, start_addr: 48'h02001000, end_addr: 48'h02001400 },
'{ idx: 2, start_addr: 48'h02001400, end_addr: 48'h02001800 },
'{ idx: 3, start_addr: 48'h02001800, end_addr: 48'h02001c00 },
'{ idx: 4, start_addr: 48'h02002000, end_addr: 48'h02003000 },
'{ idx: 5, start_addr: 48'h02003000, end_addr: 48'h02004000 },
'{ idx: 6, start_addr: 48'h02004000, end_addr: 48'h02005000 },
'{ idx: 7, start_addr: 48'h02005000, end_addr: 48'h02006000 },
'{ idx: 8, start_addr: 48'h02006000, end_addr: 48'h02007000 },
'{ idx: 9, start_addr: 48'h03000000, end_addr: 48'h03020000 },
'{ idx: 10, start_addr: 48'h05000000, end_addr: 48'h05020000 },
'{ idx: 11, start_addr: 48'h06000000, end_addr: 48'h06010000 },
'{ idx: 12, start_addr: 48'h07000000, end_addr: 48'h07010000 },
'{ idx: 13, start_addr: 48'h0c000000, end_addr: 48'h10000000 },
'{ idx: 14, start_addr: 48'h01000000, end_addr: 48'h01020000 },
'{ idx: 15, start_addr: 48'h04000000, end_addr: 48'h04100000 },
'{ idx: 16, start_addr: 48'h08000000, end_addr: 48'h0a810000 }
};

/// Inputs of the `quadrant_pre_xbar_0` crossbar.
Expand Down
24 changes: 16 additions & 8 deletions hw/system/occamy/src/occamy_top.sv
Original file line number Diff line number Diff line change
Expand Up @@ -61,9 +61,13 @@ module occamy_top
output reg_a48_d32_req_t bootrom_req_o,
input reg_a48_d32_rsp_t bootrom_rsp_i,

/// Clk manager
output reg_a48_d32_req_t clk_mgr_req_o,
input reg_a48_d32_rsp_t clk_mgr_rsp_i,
/// FLLs
output reg_a48_d32_req_t fll_system_req_o,
input reg_a48_d32_rsp_t fll_system_rsp_i,
output reg_a48_d32_req_t fll_periph_req_o,
input reg_a48_d32_rsp_t fll_periph_rsp_i,
output reg_a48_d32_req_t fll_hbm2e_req_o,
input reg_a48_d32_rsp_t fll_hbm2e_rsp_i,

/// HBI Config and APB Control
output reg_a48_d32_req_t hbi_wide_cfg_req_o,
Expand Down Expand Up @@ -178,8 +182,8 @@ module occamy_top

reg_a48_d32_req_t [0:0] soc_regbus_periph_xbar_in_req;
reg_a48_d32_rsp_t [0:0] soc_regbus_periph_xbar_in_rsp;
reg_a48_d32_req_t [14:0] soc_regbus_periph_xbar_out_req;
reg_a48_d32_rsp_t [14:0] soc_regbus_periph_xbar_out_rsp;
reg_a48_d32_req_t [16:0] soc_regbus_periph_xbar_out_req;
reg_a48_d32_rsp_t [16:0] soc_regbus_periph_xbar_out_rsp;

logic [cf_math_pkg::idx_width(
SOC_REGBUS_PERIPH_XBAR_NUM_OUTPUTS
Expand All @@ -202,7 +206,7 @@ SOC_REGBUS_PERIPH_XBAR_NUM_OUTPUTS

addr_decode #(
.NoIndices(SOC_REGBUS_PERIPH_XBAR_NUM_OUTPUTS),
.NoRules(15),
.NoRules(17),
.addr_t(logic [47:0]),
.rule_t(xbar_rule_48_t)
) i_addr_decode_soc_regbus_periph_xbar (
Expand Down Expand Up @@ -733,8 +737,12 @@ SOC_REGBUS_PERIPH_XBAR_NUM_OUTPUTS
// Clk Mgr //
/////////////////

assign clk_mgr_req_o = soc_regbus_periph_xbar_out_req[SOC_REGBUS_PERIPH_XBAR_OUT_CLK_MGR];
assign soc_regbus_periph_xbar_out_rsp[SOC_REGBUS_PERIPH_XBAR_OUT_CLK_MGR] = clk_mgr_rsp_i;
assign fll_system_req_o = soc_regbus_periph_xbar_out_req[SOC_REGBUS_PERIPH_XBAR_OUT_FLL_SYSTEM];
assign soc_regbus_periph_xbar_out_rsp[SOC_REGBUS_PERIPH_XBAR_OUT_FLL_SYSTEM] = fll_system_rsp_i;
assign fll_periph_req_o = soc_regbus_periph_xbar_out_req[SOC_REGBUS_PERIPH_XBAR_OUT_FLL_PERIPH];
assign soc_regbus_periph_xbar_out_rsp[SOC_REGBUS_PERIPH_XBAR_OUT_FLL_PERIPH] = fll_periph_rsp_i;
assign fll_hbm2e_req_o = soc_regbus_periph_xbar_out_req[SOC_REGBUS_PERIPH_XBAR_OUT_FLL_HBM2E];
assign soc_regbus_periph_xbar_out_rsp[SOC_REGBUS_PERIPH_XBAR_OUT_FLL_HBM2E] = fll_hbm2e_rsp_i;

//////////////
// PLIC //
Expand Down
18 changes: 13 additions & 5 deletions hw/system/occamy/src/occamy_top.sv.tpl
Original file line number Diff line number Diff line change
Expand Up @@ -61,9 +61,13 @@ module ${name}_top
output ${soc_regbus_periph_xbar.out_bootrom.req_type()} bootrom_req_o,
input ${soc_regbus_periph_xbar.out_bootrom.rsp_type()} bootrom_rsp_i,

/// Clk manager
output ${soc_regbus_periph_xbar.out_clk_mgr.req_type()} clk_mgr_req_o,
input ${soc_regbus_periph_xbar.out_clk_mgr.rsp_type()} clk_mgr_rsp_i,
/// FLLs
output ${soc_regbus_periph_xbar.out_fll_system.req_type()} fll_system_req_o,
input ${soc_regbus_periph_xbar.out_fll_system.rsp_type()} fll_system_rsp_i,
output ${soc_regbus_periph_xbar.out_fll_periph.req_type()} fll_periph_req_o,
input ${soc_regbus_periph_xbar.out_fll_periph.rsp_type()} fll_periph_rsp_i,
output ${soc_regbus_periph_xbar.out_fll_hbm2e.req_type()} fll_hbm2e_req_o,
input ${soc_regbus_periph_xbar.out_fll_hbm2e.rsp_type()} fll_hbm2e_rsp_i,

/// HBI Config and APB Control
output ${soc_regbus_periph_xbar.out_hbi_wide_cfg.req_type()} hbi_wide_cfg_req_o,
Expand Down Expand Up @@ -459,8 +463,12 @@ module ${name}_top
// Clk Mgr //
/////////////////

assign clk_mgr_req_o = ${soc_regbus_periph_xbar.out_clk_mgr.req_name()};
assign ${soc_regbus_periph_xbar.out_clk_mgr.rsp_name()} = clk_mgr_rsp_i;
assign fll_system_req_o = ${soc_regbus_periph_xbar.out_fll_system.req_name()};
assign ${soc_regbus_periph_xbar.out_fll_system.rsp_name()} = fll_system_rsp_i;
assign fll_periph_req_o = ${soc_regbus_periph_xbar.out_fll_periph.req_name()};
assign ${soc_regbus_periph_xbar.out_fll_periph.rsp_name()} = fll_periph_rsp_i;
assign fll_hbm2e_req_o = ${soc_regbus_periph_xbar.out_fll_hbm2e.req_name()};
assign ${soc_regbus_periph_xbar.out_fll_hbm2e.rsp_name()} = fll_hbm2e_rsp_i;

//////////////
// PLIC //
Expand Down
52 changes: 31 additions & 21 deletions hw/system/occamy/src/occamy_xilinx.sv
Original file line number Diff line number Diff line change
Expand Up @@ -592,33 +592,43 @@ module occamy_xilinx
end
end

/// Clk manager
reg_a48_d32_req_t clk_mgr_req;
reg_a48_d32_rsp_t clk_mgr_rsp;
/// FLLs
reg_a48_d32_req_t fll_system_req;
reg_a48_d32_rsp_t fll_system_rsp;
reg_a48_d32_req_t fll_periph_req;
reg_a48_d32_rsp_t fll_periph_rsp;
reg_a48_d32_req_t fll_hbm2e_req;
reg_a48_d32_rsp_t fll_hbm2e_rsp;

// Occamy top-level
occamy_top i_occamy (
.bootrom_req_o(bootrom_req),
.bootrom_rsp_i(bootrom_rsp),
.clk_mgr_req_o(clk_mgr_req),
.clk_mgr_rsp_i(clk_mgr_rsp),
.pcie_cfg_req_o(),
.pcie_cfg_rsp_i('0),
.bootrom_req_o (bootrom_req),
.bootrom_rsp_i (bootrom_rsp),
.fll_system_req_o(fll_system_req),
.fll_system_rsp_i(fll_system_rsp),
.fll_periph_req_o(fll_periph_req),
.fll_periph_rsp_i(fll_periph_rsp),
.fll_hbm2e_req_o (fll_hbm2e_req),
.fll_hbm2e_rsp_i (fll_hbm2e_rsp),
.pcie_cfg_req_o (),
.pcie_cfg_rsp_i ('0),
// Tie the HBM interrupts to zero.
.ext_irq_i({8'b0, ext_irq_i}),
.apb_hbm_cfg_req_o(),
.apb_hbm_cfg_rsp_i('0),
.hbi_cfg_req_o(),
.hbi_cfg_rsp_i('0),
.apb_hbi_ctl_req_o(),
.apb_hbi_ctl_rsp_i('0),
.hbm_phy_cfg_req_o(),
.hbm_phy_cfg_rsp_i('0),
.hbm_seq_req_o(),
.hbm_seq_rsp_i('0),
.ext_irq_i ({8'b0, ext_irq_i}),
.apb_hbm_cfg_req_o (),
.apb_hbm_cfg_rsp_i ('0),
.hbi_cfg_req_o (),
.hbi_cfg_rsp_i ('0),
.apb_hbi_ctl_req_o (),
.apb_hbi_ctl_rsp_i ('0),
.hbm_phy_cfg_req_o (),
.hbm_phy_cfg_rsp_i ('0),
.hbm_seq_req_o (),
.hbm_seq_rsp_i ('0),
.*
);

assign clk_mgr_rsp = '0;
assign fll_system_rsp = '0;
assign fll_periph_rsp = '0;
assign fll_hbm2e_rsp = '0;

endmodule
30 changes: 20 additions & 10 deletions hw/system/occamy/src/occamy_xilinx.sv.tpl
Original file line number Diff line number Diff line change
Expand Up @@ -124,18 +124,26 @@ import ${name}_pkg::*;
end
end

/// Clk manager
${soc_regbus_periph_xbar.out_clk_mgr.req_type()} clk_mgr_req;
${soc_regbus_periph_xbar.out_clk_mgr.rsp_type()} clk_mgr_rsp;
/// FLLs
${soc_regbus_periph_xbar.out_fll_system.req_type()} fll_system_req;
${soc_regbus_periph_xbar.out_fll_system.rsp_type()} fll_system_rsp;
${soc_regbus_periph_xbar.out_fll_periph.req_type()} fll_periph_req;
${soc_regbus_periph_xbar.out_fll_periph.rsp_type()} fll_periph_rsp;
${soc_regbus_periph_xbar.out_fll_hbm2e.req_type()} fll_hbm2e_req;
${soc_regbus_periph_xbar.out_fll_hbm2e.rsp_type()} fll_hbm2e_rsp;

// Occamy top-level
${name}_top i_${name} (
.bootrom_req_o (bootrom_req),
.bootrom_rsp_i (bootrom_rsp),
.clk_mgr_req_o (clk_mgr_req),
.clk_mgr_rsp_i (clk_mgr_rsp),
.pcie_cfg_req_o (),
.pcie_cfg_rsp_i ('0),
.bootrom_req_o (bootrom_req),
.bootrom_rsp_i (bootrom_rsp),
.fll_system_req_o(fll_system_req),
.fll_system_rsp_i(fll_system_rsp),
.fll_periph_req_o(fll_periph_req),
.fll_periph_rsp_i(fll_periph_rsp),
.fll_hbm2e_req_o (fll_hbm2e_req),
.fll_hbm2e_rsp_i (fll_hbm2e_rsp),
.pcie_cfg_req_o (),
.pcie_cfg_rsp_i ('0),
// Tie the HBM interrupts to zero.
.ext_irq_i ({8'b0, ext_irq_i}),
.apb_hbm_cfg_req_o (),
Expand All @@ -151,6 +159,8 @@ import ${name}_pkg::*;
.*
);
assign clk_mgr_rsp = '0;
assign fll_system_rsp = '0;
assign fll_periph_rsp = '0;
assign fll_hbm2e_rsp = '0;
endmodule
50 changes: 43 additions & 7 deletions hw/system/occamy/test/testharness.sv
Original file line number Diff line number Diff line change
Expand Up @@ -216,19 +216,51 @@ module testharness import occamy_pkg::*; (
);


reg_a48_d32_req_t clk_mgr_req;
reg_a48_d32_rsp_t clk_mgr_rsp;
reg_a48_d32_req_t fll_system_req;
reg_a48_d32_rsp_t fll_system_rsp;

tb_memory_regbus #(
.AddrWidth (48),
.DataWidth (32),
.req_t (reg_a48_d32_req_t),
.rsp_t (reg_a48_d32_rsp_t)
) i_clk_mgr_channel (
) i_fll_system_channel (
.clk_i,
.rst_ni,
.req_i (clk_mgr_req),
.rsp_o (clk_mgr_rsp)
.req_i (fll_system_req),
.rsp_o (fll_system_rsp)
);


reg_a48_d32_req_t fll_periph_req;
reg_a48_d32_rsp_t fll_periph_rsp;

tb_memory_regbus #(
.AddrWidth (48),
.DataWidth (32),
.req_t (reg_a48_d32_req_t),
.rsp_t (reg_a48_d32_rsp_t)
) i_fll_periph_channel (
.clk_i,
.rst_ni,
.req_i (fll_periph_req),
.rsp_o (fll_periph_rsp)
);


reg_a48_d32_req_t fll_hbm2e_req;
reg_a48_d32_rsp_t fll_hbm2e_rsp;

tb_memory_regbus #(
.AddrWidth (48),
.DataWidth (32),
.req_t (reg_a48_d32_req_t),
.rsp_t (reg_a48_d32_rsp_t)
) i_fll_hbm2e_channel (
.clk_i,
.rst_ni,
.req_i (fll_hbm2e_req),
.rsp_o (fll_hbm2e_rsp)
);

occamy_top i_occamy (
Expand Down Expand Up @@ -271,8 +303,12 @@ module testharness import occamy_pkg::*; (
.spim_sd_i ('0),
.bootrom_req_o (bootrom_regbus_req),
.bootrom_rsp_i (bootrom_regbus_rsp),
.clk_mgr_req_o (clk_mgr_req),
.clk_mgr_rsp_i (clk_mgr_rsp),
.fll_system_req_o (fll_system_req),
.fll_system_rsp_i (fll_system_rsp),
.fll_periph_req_o (fll_periph_req),
.fll_periph_rsp_i (fll_periph_rsp),
.fll_hbm2e_req_o (fll_hbm2e_req),
.fll_hbm2e_rsp_i (fll_hbm2e_rsp),
.hbi_wide_cfg_req_o (),
.hbi_wide_cfg_rsp_i ('0),
.hbi_narrow_cfg_req_o (),
Expand Down
12 changes: 9 additions & 3 deletions hw/system/occamy/test/testharness.sv.tpl
Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,9 @@ module testharness import occamy_pkg::*; (
logic tx, rx;
${tb_memory(soc_narrow_xbar.out_pcie, "pcie_axi")}
${tb_memory(soc_regbus_periph_xbar.out_bootrom, "bootrom_regbus")}
${tb_memory(soc_regbus_periph_xbar.out_clk_mgr, "clk_mgr")}
${tb_memory(soc_regbus_periph_xbar.out_fll_system, "fll_system")}
${tb_memory(soc_regbus_periph_xbar.out_fll_periph, "fll_periph")}
${tb_memory(soc_regbus_periph_xbar.out_fll_hbm2e, "fll_hbm2e")}
occamy_top i_occamy (
.clk_i,
.rst_ni,
Expand Down Expand Up @@ -98,8 +100,12 @@ module testharness import occamy_pkg::*; (
.spim_sd_i ('0),
.bootrom_req_o (bootrom_regbus_req),
.bootrom_rsp_i (bootrom_regbus_rsp),
.clk_mgr_req_o (clk_mgr_req),
.clk_mgr_rsp_i (clk_mgr_rsp),
.fll_system_req_o (fll_system_req),
.fll_system_rsp_i (fll_system_rsp),
.fll_periph_req_o (fll_periph_req),
.fll_periph_rsp_i (fll_periph_rsp),
.fll_hbm2e_req_o (fll_hbm2e_req),
.fll_hbm2e_rsp_i (fll_hbm2e_rsp),
.hbi_wide_cfg_req_o (),
.hbi_wide_cfg_rsp_i ('0),
.hbi_narrow_cfg_req_o (),
Expand Down
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