Patch for VCS #300
reviewdog [verible-verilog-lint] report
reported by reviewdog 🐶
Findings (4)
src/frontend/inst64/idma_inst64_top.sv|381 col 101| Line length exceeds max: 100; is: 149 [Style: line-length] [line-length]
src/frontend/inst64/idma_inst64_top.sv|383 col 101| Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]
src/frontend/inst64/idma_inst64_top.sv|393 col 101| Line length exceeds max: 100; is: 149 [Style: line-length] [line-length]
src/frontend/inst64/idma_inst64_top.sv|395 col 101| Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]
Filtered Findings (0)
Annotations
Check warning on line 381 in src/frontend/inst64/idma_inst64_top.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] src/frontend/inst64/idma_inst64_top.sv#L381
Line length exceeds max: 100; is: 149 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 149 [Style: line-length] [line-length]" location:{path:"src/frontend/inst64/idma_inst64_top.sv" range:{start:{line:381 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 383 in src/frontend/inst64/idma_inst64_top.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] src/frontend/inst64/idma_inst64_top.sv#L383
Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]" location:{path:"src/frontend/inst64/idma_inst64_top.sv" range:{start:{line:383 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 393 in src/frontend/inst64/idma_inst64_top.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] src/frontend/inst64/idma_inst64_top.sv#L393
Line length exceeds max: 100; is: 149 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 149 [Style: line-length] [line-length]" location:{path:"src/frontend/inst64/idma_inst64_top.sv" range:{start:{line:393 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 395 in src/frontend/inst64/idma_inst64_top.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] src/frontend/inst64/idma_inst64_top.sv#L395
Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 114 [Style: line-length] [line-length]" location:{path:"src/frontend/inst64/idma_inst64_top.sv" range:{start:{line:395 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}