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Yvan Tortorella
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// Copyright 2018 ETH Zurich and University of Bologna. | ||
// Copyright and related rights are licensed under the Solderpad Hardware | ||
// License, Version 0.51 (the "License"); you may not use this file except in | ||
// compliance with the License. You may obtain a copy of the License at | ||
// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law | ||
// or agreed to in writing, software, hardware and materials distributed under | ||
// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR | ||
// CONDITIONS OF ANY KIND, either express or implied. See the License for the | ||
// specific language governing permissions and limitations under the License. | ||
// | ||
// Author: Yvan Tortorella <[email protected]>, University of Bologna | ||
// Description: parametric ECC wrapper for SEC-DED in CVA6 SRAMs | ||
|
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module ecc_wrap #( | ||
parameter int unsigned DataWidth = 32, | ||
parameter int unsigned ParityWidth = 7 , | ||
localparam int unsigned EccDataWidth = DataWidth + ParityWidth | ||
)( | ||
input logic [DataWidth-1:0] wdata_i, | ||
output logic [EccDataWidth-1:0] wdata_o, | ||
input logic [EccDataWidth-1:0] rdata_i, | ||
output logic [DataWidth-1:0] rdata_o, | ||
output logic [ParityWidth-1:0] syndrome_o, | ||
output logic [1:0] error_o | ||
); | ||
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hsiao_ecc_enc #( | ||
.DataWidth ( DataWidth ), | ||
.ProtWidth ( ParityWidth ), | ||
.TotalWidth ( EccDataWidth ) | ||
) i_ecc_encoder ( | ||
.in ( wdata_i ), | ||
.out ( wdata_o ) | ||
); | ||
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hsiao_ecc_dec #( | ||
.DataWidth ( DataWidth ), | ||
.ProtWidth ( ParityWidth ), | ||
.TotalWidth ( EccDataWidth ) | ||
) i_ecc_decoder ( | ||
.in ( rdata_i ), | ||
.d_o ( rdata_o ), | ||
.syndrome_o ( syndrome_o ), | ||
.err_o ( error_o ) | ||
); | ||
|
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endmodule: ecc_wrap |
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// Copyright lowRISC contributors. | ||
// Licensed under the Apache License, Version 2.0, see LICENSE for details. | ||
// SPDX-License-Identifier: Apache-2.0 | ||
// | ||
// HSIAO SECDED Encoder/Decoder for 8-bit words | ||
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module secded_13_8_enc ( | ||
input [7:0] in, | ||
output logic [12:0] out | ||
); | ||
|
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always_comb begin : p_encode | ||
out[7:0] = in; | ||
out[8] = ^(in & 8'h6B); | ||
out[9] = ^(in & 8'hF8); | ||
out[10] = ^(in & 8'hD5); | ||
out[11] = ^(in & 8'hA7); | ||
out[12] = ^(in & 8'h1E); | ||
end | ||
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endmodule : secded_13_8_enc | ||
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module secded_13_8_dec ( | ||
input [12:0] in, | ||
output logic [7:0] d_o, | ||
output logic [4:0] syndrome_o, | ||
output logic [1:0] err_o | ||
); | ||
|
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logic single_error; | ||
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// Syndrome calculation | ||
assign syndrome_o[0] = ^(in & 13'h016B); | ||
assign syndrome_o[1] = ^(in & 13'h02F8); | ||
assign syndrome_o[2] = ^(in & 13'h04D5); | ||
assign syndrome_o[3] = ^(in & 13'h08A7); | ||
assign syndrome_o[4] = ^(in & 13'h101E); | ||
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// Corrected output calculation | ||
assign d_o[0] = (syndrome_o == 5'hd) ^ in[0]; | ||
assign d_o[1] = (syndrome_o == 5'h19) ^ in[1]; | ||
assign d_o[2] = (syndrome_o == 5'h1c) ^ in[2]; | ||
assign d_o[3] = (syndrome_o == 5'h13) ^ in[3]; | ||
assign d_o[4] = (syndrome_o == 5'h16) ^ in[4]; | ||
assign d_o[5] = (syndrome_o == 5'hb) ^ in[5]; | ||
assign d_o[6] = (syndrome_o == 5'h7) ^ in[6]; | ||
assign d_o[7] = (syndrome_o == 5'he) ^ in[7]; | ||
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// err_o calc. bit0: single error, bit1: double error | ||
assign single_error = ^syndrome_o; | ||
assign err_o[0] = single_error; | ||
assign err_o[1] = ~single_error & (|syndrome_o); | ||
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endmodule : secded_13_8_dec |
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// Copyright lowRISC contributors. | ||
// Licensed under the Apache License, Version 2.0, see LICENSE for details. | ||
// SPDX-License-Identifier: Apache-2.0 | ||
// | ||
// HSIAO SECDED Encoder/Decoder for 32-bit words | ||
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module secded_39_32_enc ( | ||
input [31:0] in, | ||
output logic [38:0] out | ||
); | ||
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always_comb begin : p_encode | ||
out[31:0] = in; | ||
out[32] = ^(in & 32'h3800CDBC); | ||
out[33] = ^(in & 32'hC439C325); | ||
out[34] = ^(in & 32'h52D82C63); | ||
out[35] = ^(in & 32'hA4363856); | ||
out[36] = ^(in & 32'h9B833109); | ||
out[37] = ^(in & 32'h2DCF42C0); | ||
out[38] = ^(in & 32'h4364969A); | ||
end | ||
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endmodule : secded_39_32_enc | ||
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module secded_39_32_dec ( | ||
input [38:0] in, | ||
output logic [31:0] d_o, | ||
output logic [6:0] syndrome_o, | ||
output logic [1:0] err_o | ||
); | ||
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logic single_error; | ||
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// Syndrome calculation | ||
assign syndrome_o[0] = ^(in & 39'h013800CDBC); | ||
assign syndrome_o[1] = ^(in & 39'h02C439C325); | ||
assign syndrome_o[2] = ^(in & 39'h0452D82C63); | ||
assign syndrome_o[3] = ^(in & 39'h08A4363856); | ||
assign syndrome_o[4] = ^(in & 39'h109B833109); | ||
assign syndrome_o[5] = ^(in & 39'h202DCF42C0); | ||
assign syndrome_o[6] = ^(in & 39'h404364969A); | ||
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// Corrected output calculation | ||
assign d_o[0] = (syndrome_o == 7'h16) ^ in[0]; | ||
assign d_o[1] = (syndrome_o == 7'h4c) ^ in[1]; | ||
assign d_o[2] = (syndrome_o == 7'hb) ^ in[2]; | ||
assign d_o[3] = (syndrome_o == 7'h51) ^ in[3]; | ||
assign d_o[4] = (syndrome_o == 7'h49) ^ in[4]; | ||
assign d_o[5] = (syndrome_o == 7'h7) ^ in[5]; | ||
assign d_o[6] = (syndrome_o == 7'h2c) ^ in[6]; | ||
assign d_o[7] = (syndrome_o == 7'h61) ^ in[7]; | ||
assign d_o[8] = (syndrome_o == 7'h13) ^ in[8]; | ||
assign d_o[9] = (syndrome_o == 7'h62) ^ in[9]; | ||
assign d_o[10] = (syndrome_o == 7'h45) ^ in[10]; | ||
assign d_o[11] = (syndrome_o == 7'hd) ^ in[11]; | ||
assign d_o[12] = (syndrome_o == 7'h58) ^ in[12]; | ||
assign d_o[13] = (syndrome_o == 7'h1c) ^ in[13]; | ||
assign d_o[14] = (syndrome_o == 7'h23) ^ in[14]; | ||
assign d_o[15] = (syndrome_o == 7'h43) ^ in[15]; | ||
assign d_o[16] = (syndrome_o == 7'h32) ^ in[16]; | ||
assign d_o[17] = (syndrome_o == 7'h38) ^ in[17]; | ||
assign d_o[18] = (syndrome_o == 7'h68) ^ in[18]; | ||
assign d_o[19] = (syndrome_o == 7'h26) ^ in[19]; | ||
assign d_o[20] = (syndrome_o == 7'he) ^ in[20]; | ||
assign d_o[21] = (syndrome_o == 7'h4a) ^ in[21]; | ||
assign d_o[22] = (syndrome_o == 7'h64) ^ in[22]; | ||
assign d_o[23] = (syndrome_o == 7'h34) ^ in[23]; | ||
assign d_o[24] = (syndrome_o == 7'h70) ^ in[24]; | ||
assign d_o[25] = (syndrome_o == 7'h54) ^ in[25]; | ||
assign d_o[26] = (syndrome_o == 7'h2a) ^ in[26]; | ||
assign d_o[27] = (syndrome_o == 7'h31) ^ in[27]; | ||
assign d_o[28] = (syndrome_o == 7'h15) ^ in[28]; | ||
assign d_o[29] = (syndrome_o == 7'h29) ^ in[29]; | ||
assign d_o[30] = (syndrome_o == 7'h46) ^ in[30]; | ||
assign d_o[31] = (syndrome_o == 7'h1a) ^ in[31]; | ||
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// err_o calc. bit0: single error, bit1: double error | ||
assign single_error = ^syndrome_o; | ||
assign err_o[0] = single_error; | ||
assign err_o[1] = ~single_error & (|syndrome_o); | ||
|
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endmodule : secded_39_32_dec |
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// Copyright lowRISC contributors. | ||
// Licensed under the Apache License, Version 2.0, see LICENSE for details. | ||
// SPDX-License-Identifier: Apache-2.0 | ||
// | ||
// HSIAO SECDED Encoder/Decoder for 64-bit words | ||
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module secded_72_64_enc ( | ||
input [63:0] in, | ||
output logic [71:0] out | ||
); | ||
|
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always_comb begin : p_encode | ||
out[63:0] = in; | ||
out[64] = ^(in & 64'hF8000000001FFFFF); | ||
out[65] = ^(in & 64'h9D00000FFFE0003F); | ||
out[66] = ^(in & 64'h8F003FF003E007C1); | ||
out[67] = ^(in & 64'hF10FC0F03C207842); | ||
out[68] = ^(in & 64'h6E71C711C4438884); | ||
out[69] = ^(in & 64'h3EB65926488C9108); | ||
out[70] = ^(in & 64'hD3DAAA4A91152210); | ||
out[71] = ^(in & 64'h67ED348D221A4420); | ||
end | ||
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endmodule : secded_72_64_enc | ||
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module secded_72_64_dec ( | ||
input [71:0] in, | ||
output logic [63:0] d_o, | ||
output logic [7:0] syndrome_o, | ||
output logic [1:0] err_o | ||
); | ||
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logic single_error; | ||
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// Syndrome calculation | ||
assign syndrome_o[0] = ^(in & 72'h01F8000000001FFFFF); | ||
assign syndrome_o[1] = ^(in & 72'h029D00000FFFE0003F); | ||
assign syndrome_o[2] = ^(in & 72'h048F003FF003E007C1); | ||
assign syndrome_o[3] = ^(in & 72'h08F10FC0F03C207842); | ||
assign syndrome_o[4] = ^(in & 72'h106E71C711C4438884); | ||
assign syndrome_o[5] = ^(in & 72'h203EB65926488C9108); | ||
assign syndrome_o[6] = ^(in & 72'h40D3DAAA4A91152210); | ||
assign syndrome_o[7] = ^(in & 72'h8067ED348D221A4420); | ||
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// Corrected output calculation | ||
assign d_o[0] = (syndrome_o == 8'h7) ^ in[0]; | ||
assign d_o[1] = (syndrome_o == 8'hb) ^ in[1]; | ||
assign d_o[2] = (syndrome_o == 8'h13) ^ in[2]; | ||
assign d_o[3] = (syndrome_o == 8'h23) ^ in[3]; | ||
assign d_o[4] = (syndrome_o == 8'h43) ^ in[4]; | ||
assign d_o[5] = (syndrome_o == 8'h83) ^ in[5]; | ||
assign d_o[6] = (syndrome_o == 8'hd) ^ in[6]; | ||
assign d_o[7] = (syndrome_o == 8'h15) ^ in[7]; | ||
assign d_o[8] = (syndrome_o == 8'h25) ^ in[8]; | ||
assign d_o[9] = (syndrome_o == 8'h45) ^ in[9]; | ||
assign d_o[10] = (syndrome_o == 8'h85) ^ in[10]; | ||
assign d_o[11] = (syndrome_o == 8'h19) ^ in[11]; | ||
assign d_o[12] = (syndrome_o == 8'h29) ^ in[12]; | ||
assign d_o[13] = (syndrome_o == 8'h49) ^ in[13]; | ||
assign d_o[14] = (syndrome_o == 8'h89) ^ in[14]; | ||
assign d_o[15] = (syndrome_o == 8'h31) ^ in[15]; | ||
assign d_o[16] = (syndrome_o == 8'h51) ^ in[16]; | ||
assign d_o[17] = (syndrome_o == 8'h91) ^ in[17]; | ||
assign d_o[18] = (syndrome_o == 8'h61) ^ in[18]; | ||
assign d_o[19] = (syndrome_o == 8'ha1) ^ in[19]; | ||
assign d_o[20] = (syndrome_o == 8'hc1) ^ in[20]; | ||
assign d_o[21] = (syndrome_o == 8'he) ^ in[21]; | ||
assign d_o[22] = (syndrome_o == 8'h16) ^ in[22]; | ||
assign d_o[23] = (syndrome_o == 8'h26) ^ in[23]; | ||
assign d_o[24] = (syndrome_o == 8'h46) ^ in[24]; | ||
assign d_o[25] = (syndrome_o == 8'h86) ^ in[25]; | ||
assign d_o[26] = (syndrome_o == 8'h1a) ^ in[26]; | ||
assign d_o[27] = (syndrome_o == 8'h2a) ^ in[27]; | ||
assign d_o[28] = (syndrome_o == 8'h4a) ^ in[28]; | ||
assign d_o[29] = (syndrome_o == 8'h8a) ^ in[29]; | ||
assign d_o[30] = (syndrome_o == 8'h32) ^ in[30]; | ||
assign d_o[31] = (syndrome_o == 8'h52) ^ in[31]; | ||
assign d_o[32] = (syndrome_o == 8'h92) ^ in[32]; | ||
assign d_o[33] = (syndrome_o == 8'h62) ^ in[33]; | ||
assign d_o[34] = (syndrome_o == 8'ha2) ^ in[34]; | ||
assign d_o[35] = (syndrome_o == 8'hc2) ^ in[35]; | ||
assign d_o[36] = (syndrome_o == 8'h1c) ^ in[36]; | ||
assign d_o[37] = (syndrome_o == 8'h2c) ^ in[37]; | ||
assign d_o[38] = (syndrome_o == 8'h4c) ^ in[38]; | ||
assign d_o[39] = (syndrome_o == 8'h8c) ^ in[39]; | ||
assign d_o[40] = (syndrome_o == 8'h34) ^ in[40]; | ||
assign d_o[41] = (syndrome_o == 8'h54) ^ in[41]; | ||
assign d_o[42] = (syndrome_o == 8'h94) ^ in[42]; | ||
assign d_o[43] = (syndrome_o == 8'h64) ^ in[43]; | ||
assign d_o[44] = (syndrome_o == 8'ha4) ^ in[44]; | ||
assign d_o[45] = (syndrome_o == 8'hc4) ^ in[45]; | ||
assign d_o[46] = (syndrome_o == 8'h38) ^ in[46]; | ||
assign d_o[47] = (syndrome_o == 8'h58) ^ in[47]; | ||
assign d_o[48] = (syndrome_o == 8'h98) ^ in[48]; | ||
assign d_o[49] = (syndrome_o == 8'h68) ^ in[49]; | ||
assign d_o[50] = (syndrome_o == 8'ha8) ^ in[50]; | ||
assign d_o[51] = (syndrome_o == 8'hc8) ^ in[51]; | ||
assign d_o[52] = (syndrome_o == 8'h70) ^ in[52]; | ||
assign d_o[53] = (syndrome_o == 8'hb0) ^ in[53]; | ||
assign d_o[54] = (syndrome_o == 8'hd0) ^ in[54]; | ||
assign d_o[55] = (syndrome_o == 8'he0) ^ in[55]; | ||
assign d_o[56] = (syndrome_o == 8'hce) ^ in[56]; | ||
assign d_o[57] = (syndrome_o == 8'hf4) ^ in[57]; | ||
assign d_o[58] = (syndrome_o == 8'hb6) ^ in[58]; | ||
assign d_o[59] = (syndrome_o == 8'h37) ^ in[59]; | ||
assign d_o[60] = (syndrome_o == 8'h6b) ^ in[60]; | ||
assign d_o[61] = (syndrome_o == 8'hb9) ^ in[61]; | ||
assign d_o[62] = (syndrome_o == 8'hd9) ^ in[62]; | ||
assign d_o[63] = (syndrome_o == 8'h4f) ^ in[63]; | ||
|
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// err_o calc. bit0: single error, bit1: double error | ||
assign single_error = ^syndrome_o; | ||
assign err_o[0] = single_error; | ||
assign err_o[1] = ~single_error & (|syndrome_o); | ||
|
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endmodule : secded_72_64_dec |
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