Skip to content

Avoid wide signals in sensitivity lists of immediate assertions #309

Avoid wide signals in sensitivity lists of immediate assertions

Avoid wide signals in sensitivity lists of immediate assertions #309

GitHub Actions / verible-verilog-lint succeeded Oct 3, 2024 in 1s

reviewdog [verible-verilog-lint] report

reported by reviewdog 🐶

Findings (0)
Filtered Findings (0)