mem_to_banks_detailed: Fix HideStrb alignment
#225
micprogAnnotations
5 warnings
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[verible-verilog-lint] src/mem_to_banks_detailed.sv#L159:
src/mem_to_banks_detailed.sv#L159
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
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[verible-verilog-lint] src/mem_to_banks_detailed.sv#L160:
src/mem_to_banks_detailed.sv#L160
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
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Verilog Sources
The following actions uses Node.js version which is deprecated and will be forced to run on node20: actions/checkout@v3. For more info: https://github.blog/changelog/2024-03-07-github-actions-all-actions-will-run-on-node20-instead-of-node16-by-default/
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[verible-verilog-lint] src/mem_to_banks_detailed.sv#L159:
src/mem_to_banks_detailed.sv#L159
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
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[verible-verilog-lint] src/mem_to_banks_detailed.sv#L160:
src/mem_to_banks_detailed.sv#L160
Line length exceeds max: 100; is: 105 [Style: line-length] [line-length]
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Artifacts
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verible-linter
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272 Bytes |
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