treewide: Add Ethernet peripheral #104
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GitHub Actions / verible-verilog-lint
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Dec 13, 2024 in 0s
reviewdog [verible-verilog-lint] report
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Findings (2)
hw/bootrom/cheshire_bootrom.sv|2084 col 10| File must end with a newline. [Style: posix-file-endings] [posix-eof]
hw/dma_core_wrap.sv|357 col 10| File must end with a newline. [Style: posix-file-endings] [posix-eof]
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Annotations
Check warning on line 2084 in hw/bootrom/cheshire_bootrom.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/bootrom/cheshire_bootrom.sv#L2084
File must end with a newline. [Style: posix-file-endings] [posix-eof]
Raw output
message:"File must end with a newline. [Style: posix-file-endings] [posix-eof]" location:{path:"hw/bootrom/cheshire_bootrom.sv" range:{start:{line:2084 column:10}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:2084 column:10} end:{line:2085}} text:"endmodule\n"}
Check warning on line 357 in hw/dma_core_wrap.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/dma_core_wrap.sv#L357
File must end with a newline. [Style: posix-file-endings] [posix-eof]
Raw output
message:"File must end with a newline. [Style: posix-file-endings] [posix-eof]" location:{path:"hw/dma_core_wrap.sv" range:{start:{line:357 column:10}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:357 column:10} end:{line:358}} text:"endmodule\n"}
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