chenge the AxiMaxReads in axi_dw_converter to 8, to meet the vivado i…

…mplementation timing constraint
pulp-platform · Dec 29, 2023 · ce42f85 · ce42f85
1 parent 8ea9652
commit ce42f85
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Showing 2 changed files with 4 additions and 3 deletions.
diff --git a/hw/c910_pkg.sv b/hw/c910_pkg.sv
@@ -13,7 +13,7 @@ package c910_pkg;
   // localparam AxiIdWidthSlaves = AxiIdWidthMaster + $clog2(NrMasters); // 5
   // localparam AxiUserWidth = 1;
 
-  // // 2n(Non-cacheable/Device) + 28(cacheable) read + 2n(Non-cacheable/Device) + 32(cacheable) write
+  // // 8n(Non-cacheable/Device) + 28(cacheable) read + 8n(Non-cacheable/Device) + 32(cacheable) write
   // localparam AxiMaxMstTrans = 8 * NrMasters + 28 + 8 * NrMasters + 32;
 
 endpackage
diff --git a/hw/cheshire_soc.sv b/hw/cheshire_soc.sv
@@ -677,7 +677,8 @@ module cheshire_soc
         // plic
         .plic_hartx_mint_req_i ({1'b0, xeip[i].m}),
         .plic_hartx_sint_req_i ({1'b0, xeip[i].s}),
-
+        // debug request (async)
+        .debug_req_i      ( '0 ),
         // External interrupts to c910 internal plic
         .ext_int_i        ( '0 /*{39'b0, intr.ext}*/   ),
         // JTAG
@@ -791,7 +792,7 @@ module cheshire_soc
 
 
       axi_dw_converter #(
-          .AxiMaxReads         ( Cfg.AxiMaxMstTrans     ), // Number of outstanding reads
+          .AxiMaxReads         ( 8 ),// soc910_pkg::AxiMaxMstReadTrans is too large // Number of outstanding reads
           .AxiSlvPortDataWidth ( soc910_pkg::AxiDataWidth ), // Data width of the slv port
           .AxiMstPortDataWidth ( Cfg.AxiDataWidth       ), // Data width of the mst port
           .AxiAddrWidth        ( Cfg.AddrWidth          ), // Address width