Template for submitting TinyTapeout based projects to the Open MPW shuttle program.
-
Generate a new project based on this template.
-
Set GitHub Pages
Sources
asGitHub Actions
. -
If using Wokwi:
-
If using Verilog:
- Add your HDL code in
verilog/rtl/
. - Edit
info.yaml
:- In
project
:- Set
wokwi_id
to0
. - Uncomment and update
top_module
to match your top-level module. - Uncomment and list your Verilog sources in
src_files
(paths relative to the root of the repository).
- Set
- In
documentation
:- Update
inputs
to document the input wire of your top-level module. - Update
outputs
to document the output wire of your top-level module.
- Update
- In
- Add your HDL code in
-
Commit, push and check the workflow summary (if successful a new commit including the hardened files will be automatically created).
-
Submit your project github repository to the next Open MPW shuttle.