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Add Microchip_FCVG484_19x19mm_Layout22x22_P0.8mm and #644
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Code Climate has analyzed commit b73d747 and detected 0 issues on this pull request. View more on Code Climate. |
@pthomas comment about the script (I'm not 100% confident so if you have a reason why this is like that tell me): Microchip_FCVG484_19x19mm_Layout22x22_P0.8mm
Microchip_FCG1152_35x35mm_Layout34x34_P1.0mm
@chschlue if you can have a look to : Joel |
0.000001 is a workaround addressing a limitation of the footprint format (0 in the file means "inherit from board setup" so if you actually want zero, you need to use a very small value instead.) Other than that, I believe @cpresser is more knowledgeable WRT the BGA generator. |
First, it needs to be decided if this is going to be a IPC-compliant footprint, or should it be build according to vendor spec. O even mix both (which I think is horrible). Thus, I would suggest to
To answer the original question. @chschlue is correct. The |
Thanks for looking at this everyone.
On Thu, Oct 1, 2020 at 6:45 AM cp-aquila ***@***.***> wrote:
First, it needs to be decided if this is going to be a IPC-compliant
footprint, or should it be build according to vendor spec. O even mix both
(which I think is horrible).
In this case, I don't see why it should be vendor specific. Its does not
have any special properties, and the pitch is rather coarse.
Thus, I would suggest to
- specify ball_diameter instead of pad_diameter.
- keep all margins at 0 to use board defaults
- that will generate a NSMD footprint, as recommened by the
manufacturer
So if we do IPC-compliant and specify ball diameter what will the pad
diameter end up being? The tables lists the ball diameter as TBD, but I do
see in the drawing it shows it, so it would end up looking like this for
the 484:
description: "FCVG484"
...
body_size_x: 19.0
body_size_y: 19.0
overall_height: 2.92
pitch: 0.8
ball_diameter: 0.5
mask_margin: 0
paste_margin: 0
layout_x: 22
layout_y: 22
…-Paul
|
You can omit the mask_margin and paste_margin parameters. Which is the same as having them at zero. |
FCG1152_35x35mm_Layout34x34_P1.0mm These packages are defined for the PolarFire SoC's in ug0902 here: https://www.microsemi.com/document-portal/doc_download/1244577-ug0902-polarfire-soc-fpga-packaging-and-pin-descriptions-user-guide These are defined as IPC parts instead of Microchip specific per group discussion.
Microchip_FCG1152_35x35mm_Layout34x34_P1.0mm
These packages are defined for the PolarFire SoC's
in ug0902 here:
https://www.microsemi.com/document-portal/doc_download/1244577-ug0902-polarfire-soc-fpga-packaging-and-pin-descriptions-user-guide
I wasn't sure about the names, should the Microchip prefix be there? Should FCG & FCVG be there?
Here's the Microchip_FCVG484_19x19mm_Layout22x22_P0.8mm:
And the Microchip_FCG1152_35x35mm_Layout34x34_P1.0mm: