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[rom_ext,e2e] Mark some tests are broken
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Those tests require the host interface to support serial break but
the CW310 used in the CI do not support it so they always fail. These
tests will need to be changed to the hyperdebug interface.

Signed-off-by: Amaury Pouly <[email protected]>
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pamaury committed Aug 29, 2024
1 parent 1f4b9ba commit 022ab09
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Showing 2 changed files with 11 additions and 0 deletions.
8 changes: 8 additions & 0 deletions sw/device/silicon_creator/rom_ext/e2e/lockdown/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,7 @@ opentitan_test(
# corresponds to the OTP controller at
# OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET + OTP_CTRL_PARAM_CREATOR_SW_CFG_OFFSET.
exit_success = "FAULT: Load Access Fault.*MTVAL=40131040\r\n",
tags = ["broken"],
),
deps = [
"//hw/top_earlgrey/sw/autogen:top_earlgrey",
Expand All @@ -47,6 +48,7 @@ opentitan_test(
# The address below # corresponds to the OTP controller at
# OTP_CTRL_CHECK_REGWEN_REG_OFFSET.
exit_success = "FAULT: Load Access Fault.*MTVAL=4013003c\r\n",
tags = ["broken"],
),
deps = [
"//hw/top_earlgrey/sw/autogen:top_earlgrey",
Expand All @@ -62,6 +64,9 @@ opentitan_test(
exec_env = {
"//hw/top_earlgrey:fpga_cw310_rom_ext": None,
},
fpga = fpga_params(
tags = ["broken"],
),
deps = [
"//hw/ip/sram_ctrl/data:sram_ctrl_c_regs",
"//hw/top_earlgrey/sw/autogen:top_earlgrey",
Expand All @@ -76,6 +81,9 @@ opentitan_test(
exec_env = {
"//hw/top_earlgrey:fpga_cw310_rom_ext": None,
},
fpga = fpga_params(
tags = ["broken"],
),
deps = [
"//hw/top_earlgrey/sw/autogen:top_earlgrey",
"//sw/device/lib/base:status",
Expand Down
3 changes: 3 additions & 0 deletions sw/device/silicon_creator/rom_ext/e2e/rescue/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -60,6 +60,7 @@ _POSITIONS = {
":boot_test_{}".format(name): "payload",
},
slot = position["slot"],
tags = ["broken"],
test_cmd = """
--exec="transport init"
--exec="fpga load-bitstream {bitstream}"
Expand Down Expand Up @@ -88,6 +89,7 @@ opentitan_test(
":boot_test_slot_a": "slot_a",
":boot_test_slot_b": "slot_b",
},
tags = ["broken"],
test_cmd = """
--exec="transport init"
--exec="fpga load-bitstream {bitstream}"
Expand Down Expand Up @@ -116,6 +118,7 @@ opentitan_test(
":boot_test_slot_a": "slot_a",
":boot_test_slot_b": "slot_b",
},
tags = ["broken"],
test_cmd = """
--exec="transport init"
--exec="fpga load-bitstream {bitstream}"
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