Top e20 dv assertion modification

.gitignore

@@ -0,0 +1,53 @@
+*~
+*.nm
+*.elf
+*.hex
+*.itb
+*.map
+*.o
+*.so
+*.objdump
+*.readelf
+*.gtkw
+*.vcd
+*.vsif
+*.sve
+*.sdb
+test_build
+dsim.env
+dsim.log
+dsim_results
+metrics.db
+metrics_history.db
+xrun_results
+vsim_results
+vmgr_sessions
+__pycache__
+*.swp
+/.cproject
+/.project
+.dvt/
+dvt_build.log
+xrun.history
+xrun.log
+xrun.key
+xcelium.d/
+waves.shm/
+*.log
+stdout.txt
+.vscode
+riviera_results/
+*/vendor_lib/dpi_dasm_spike/
+*/vendor_lib/verilab/svlib/
+work*
+vsim.dbg
+*.wlf
+transcript
+.lib-rtl
+.opt-rtl
+tools/spike
+tools/verilator*
+*_results/
+*.signature_output
+ucli.key
+vcs.cmd

README.md

@@ -4,11 +4,12 @@ SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 -->
 # Verification Environment for the CV32E20 CORE-V processor core.
 This directory hosts the CV32E20-specific SystemVerilog sources plus C and assembly test-program sources for the CV32E20 verification environment.
-Non-CV32E20-specific verification components (e.g. OBI Agent) used in this verification environment are in `../lib` and `../vendor_lib`.
+Non-CV32E20-specific verification components (e.g. OBI Agent) used in this verification environment are in `vendor_lib/openhwgroup_core-v-verif`.
 
 ## Directories:
 - **bsp**:        the "board support package" for test-programs compiled/assembled/linked for the CV32E20.  This BSP is used by both the `core` testbench and the `uvmt_cv32` UVM verification environment.
 - **env**:        the UVM environment class and its associated infrastrucutre.
+- **mk**:         Makefiles and related scriptware. You may find it useful to review the [Common Makefile README](https://github.com/openhwgroup/core-v-verif/blob/master/mk/README.md).
 - **sim**:        directory where you run the simulations.
 - **tb**:         the Testbench module that instanitates the core.
 - **tests**:      this is where all the testcases are.
@@ -18,5 +19,3 @@ There are README files in each directory with additional information.
 
 ## Getting Started
 Check out the Quick Start Guide in the [CORE-V-VERIF Verification Strategy](https://docs.openhwgroup.org/projects/core-v-verif/en/latest/quick_start.html).
-<br>
-You may also find it useful to review the [Common Makefile for the CORE-V-VERIF UVM Verification Environment](https://github.com/openhwgroup/core-v-verif/blob/master/mk/README.md).

bin/Makefile.uvmt

@@ -0,0 +1,43 @@
+#
+
+# Copyright 2020 OpenHW Group
+# 
+# Licensed under the Solderpad Hardware Licence, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+#     https://solderpad.org/licenses/
+# 
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+# 
+# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.0
+#
+###############################################################################
+#
+# Redirection script to point to makefile under core with:
+# $(CV_CORE)/sim/uvmt/Makefile
+#
+###############################################################################
+
+# Validate CV_CORE
+ifndef CV_CORE
+$(error Must set CV_CORE to a valid core)
+endif
+
+# Variables
+MAKE           = make
+MAKE_PATH     := $(shell dirname $(realpath $(firstword $(MAKEFILE_LIST))))
+CORE_V_VERIF   = $(abspath $(MAKE_PATH)/..)
+CV_CORE_LC     = $(shell echo $(CV_CORE) | tr A-Z a-z)
+
+# If no targets specified, run default target in CV_CORE
+all:
+	$(MAKE) -C $(CORE_V_VERIF)/$(CV_CORE_LC)/sim/uvmt
+
+# If specified recursively run each target in CV_CORE
+%:
+	$(MAKE) -C $(CORE_V_VERIF)/$(CV_CORE_LC)/sim/uvmt $@

bin/README.md

@@ -0,0 +1,121 @@
+Core-V-Verif Utilities
+==================================
+
+This directory contains various utilities for running tests and performing various verification-related 
+activities in the core-v-verif repository.
+
+Unless otherwise noted all utilities in this directory should be agnostic to $CWD.  Therefore a user
+should be able to run the utilities via a PATH from any directory.  The utilities will be able to 
+determine their own directory based on the implementation language hooks available.
+
+For example from a bash-type shell:<br>
+> % export PATH=./core-v-verif/bin:$PATH
+
+Requirements
+============
+Much of the scriptware in CORE-V-VERIF is written in python and makes use of external packages that are not necessarily distributed with python itself.
+An easy way to get the Python plug-ins installed on your machine is:
+> % git clone https://github.com/openhwgroup/core-v-verif.git \<core-v-verif><br>
+> % cd \<core-v-verif>/bin<br>
+> % pip3 install -r requirements.txt<br>
+
+Utility Documentation
+=====================
+
+Documentation for each of the utilities are included below.  Each utility should also support a help option
+on the command line for describing options and arguments available.
+
+## makeuvmt
+This is a simple wrapper to redirect a make call to any core's UVMT Makefile.  This redirection script
+simply requires that you either:
+- specify CV_CORE in your environment -or-
+- specify CV_CORE on the maekeuvmt command line as an override
+
+The script will then invoke make in the following directory:<br>
+> \<core-v-verif>/$(CV_CORE)/sim/uvmt
+
+This should enable simulations to be executed regardess of current shell directory.  All common make flags
+and conventions should be passed to the underlying Makefile directory.
+
+*Examples:*
+> \# makeuvmt can be invoked from any directory<br>
+> % makeuvmt test TEST=hello-world WAVES=1 SIMULATOR=vsim<br>
+> \# Override the core to cv32e40x (regardless of CV_CORE environment setting)<br>
+> % makeuvmt test TEST=hello-world WAVES=1 CV_CORE=cv32e40x<br>
+
+## ci_check
+
+Continuous integration checker script.  This script runs a quick sanity regression on the requested 
+simulator for the purposes of ensuring a pull-request can be safely made.  Note that *ci_check* should now
+be able to be executed in any directory where previously it required the user to *cd* to ci/.  Please 
+refer to *ci_check*'s help utility for more details on options
+
+If required, the step and compare ISS can be disabled for this regression by setting _--iss=0_
+
+*Examples:*
+> \# Run CI sanity regression on Xcelium<br>
+% ci_check -s xrun<br>
+> \# Run CI sanity regression on Xcelium with the ISS disabled<br>
+% ci_check -s xrun --iss=0<br>
+> \# Get help of all available options<br>
+% ci_check --help
+
+## cv_regress
+
+Regression script generator utility.  *cv_regress* will read in one or more regressions defined in a specific
+YAML format into an output format suitable for the specified regression platform or utility.  The currently supported
+output platforms are:<br>
+- Metrics JSON (--metrics)
+- Shell Script (--sh)
+- Vmanager VSIF (--vsif)
+
+The format of the YAML testlist file is given below.  All YAML regression testslists should go in the following directory:
+> core-v-verif/\<project>/regress<br>
+
+where *\<project>* is a core (cv32e40p or cva6)
+
+Note that the utility has the ability to combine multiple testlists to build larger regressions.  Therefore the --file 
+option may be specified multiple times.
+
+Please refer to the help utility of *cv_regress* for more details on the utility.
+
+*Examples:*
+> \# Read in *cv32e40p_ci_check* testlist with Questa and emit an executable shell script<br>
+% cv_regress --file=cv32e40p_ci_check.yaml --simulator=vsim --outfile=vsim_ci_check.sh
+
+### Regression YAML Format
+
+The following describes the YAML format for regression testlists.  
+
+>\<*Required*: the name of the testlist><br>
+name: \<string\><br>
+\<*Required*: human-readable description to specify the intent of the testlist><br>
+description: \<string><br>
+><br>
+\# List of builds, this can include SystemVerilog compiles and riscv-dv compiles<br>
+\# Multiple builds may be defined<br>
+builds:<br>
+&nbsp;&nbsp;build_name0:<br>
+&nbsp;&nbsp;&nbsp;&nbsp;<*Required*: make command for the build><br>
+&nbsp;&nbsp;&nbsp;&nbsp;cmd: make comp<br>
+&nbsp;&nbsp;&nbsp;&nbsp;<*Required*: make directory for the build><br>
+&nbsp;&nbsp;&nbsp;&nbsp;dir: cv32/sim/uvmt_cv32<br>
+><br>
+\# List of tests<br>
+\# Multiple tests can be defined<br>
+tests:<br>
+&nbsp;&nbsp;test_name0:<br>
+&nbsp;&nbsp;&nbsp;&nbsp;<*Required*: build dependencies, can be a list of single build_name><br>
+&nbsp;&nbsp;&nbsp;&nbsp;build: \<string><br>
+&nbsp;&nbsp;&nbsp;&nbsp;<*Required*: human-readable test description><br>
+&nbsp;&nbsp;&nbsp;&nbsp;description: \<string><br>
+&nbsp;&nbsp;&nbsp;&nbsp;<*Required*: make directory for the test><br>
+&nbsp;&nbsp;&nbsp;&nbsp;dir: \<string><br>
+&nbsp;&nbsp;&nbsp;&nbsp;<*Optional*: A make command to run before running the test(s).  This could be used for gen_* makes for corev-dv<br>
+&nbsp;&nbsp;&nbsp;&nbsp;precmd: \<string><br>
+&nbsp;&nbsp;&nbsp;&nbsp;<*Required*: make directory for the test><br>
+&nbsp;&nbsp;&nbsp;&nbsp;cmd: \<string><br>
+&nbsp;&nbsp;&nbsp;&nbsp;<*Optional*: The number of test iterations to run.  Note that all runs will receive a random seed><br>
+&nbsp;&nbsp;&nbsp;&nbsp;num: \<number>
+
+

bin/cfgyaml2make

@@ -0,0 +1,149 @@
+#!/usr/bin/env python3
+
+################################################################################
+#
+# Copyright 2020 OpenHW Group
+# Copyright 2020 Silicon Labs, Inc.
+#
+# Licensed under the Solderpad Hardware Licence, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+# 
+#     https://solderpad.org/licenses/
+# 
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier:Apache-2.0 WITH SHL-2.0
+# 
+################################################################################
+#
+# cfgyaml2make
+#   Converts a build configuration YAML to make variables
+#
+# Author: Steve Richmond
+#  email: [email protected]
+#
+# Written with Python 3.5.1 on RHEL 7.7.  Your python mileage may vary.
+#
+################################################################################
+
+import argparse
+import os
+import sys
+import tempfile
+import re
+import pprint
+import logging
+import yaml
+
+logging.basicConfig()
+logger = logging.getLogger(os.path.basename(__file__))
+logger.setLevel(logging.INFO)
+
+TOPDIR = os.path.abspath(os.path.join(os.path.dirname(os.path.realpath(__file__)), '..'))
+REQUIRED_KEYS = ('name', 'description',)
+CFG_PATHS = (
+#             '<CV_CORE>/tests/cfg',
+             'tests/cfg',
+            )
+#try:
+    #DEFAULT_CORE=os.environ['CV_CORE']
+#except KeyError:
+    #DEFAULT_CORE=None
+DEFAULT_CORE='cv32e20'
+
+if (sys.version_info < (3,0,0)):
+    print ('Requires python 3')
+    exit(1)
+
+def read_file(file):
+    '''Read a YAML build specification'''
+
+    matches = [os.path.join(TOPDIR, p, file) for p in CFG_PATHS 
+                if os.path.exists(os.path.join(TOPDIR, p, file))]
+
+    # It is a fatal error to find less than 1 or more than 1 match
+    if len(matches) == 0:
+        logger.fatal('Could not find {} in any cfg directories:'.format(file))
+        for p in CFG_PATHS:
+            logger.fatal(os.path.join(TOPDIR, p, file)) 
+        os.sys.exit(2)
+
+    if len(matches) >1 :
+        logger.fatal('Found multiple matches for {} in directories:'.format(yaml))
+        for p in CFG_PATHS:
+            logger.fatal(os.path.join(TOPDIR, p, file))
+        os.sys.exit(2)
+
+    stream = open(matches[0], 'r')
+    logger.debug('Reading cfg specification: {}'.format(matches[0]))
+    # Newer PyYAMLs must specify explicit loader (policy) or will issue warnings
+    # Older PyYAMLs will not support the Loader argument
+    # So try the new way first, then catch to the old way
+    try:
+        cfg_spec = yaml.load(stream, Loader=yaml.FullLoader)
+    except AttributeError:
+        cfg_spec = yaml.load(stream)
+    stream.close()
+
+    # Validation
+    for k in REQUIRED_KEYS:        
+        if not k in cfg_spec:
+            logger.fatal('Key [{}] was not found in cfg specification YAML:'.format(k))
+            logger.fatal('-> : {}'.format(matches[0]))
+            os.sys.exit(2)
+
+    # Debug the YAML parsing
+    pp = pprint.PrettyPrinter()
+    logger.debug('Read YAML:')
+    logger.debug(pp.pformat(cfg_spec))
+
+    return cfg_spec
+
+def emit_make(cfg_spec, prefix):
+    '''Emit a hash from the YAML test specification into a makefile that can be included'''
+    fh = tempfile.NamedTemporaryFile(mode='w', delete=False)
+    for k,v in sorted(cfg_spec.items()):
+        # Handle empty value (allowed)
+        try:
+            v_rstrip = v.rstrip()
+        except AttributeError:
+            v_rstrip = ''
+        fh.write('{}{}={}\n'.format('' if not prefix else prefix.upper() + '_', k.upper(), v_rstrip))
+    fh.close()
+
+    return fh.name
+
+################################################################################
+# Command-line arguments
+
+parser = argparse.ArgumentParser()
+parser.add_argument('-d', '--debug', action='store_true', help='Display debug messages')
+parser.add_argument('--yaml', help='Name of YAML build specification to find')
+parser.add_argument('--core', default=DEFAULT_CORE, help='Default core to test')
+parser.add_argument('--prefix', help='Prefix to add to make variables generated')
+args = parser.parse_args()
+
+if args.debug:
+    logger.setLevel(level=logging.DEBUG)
+
+# Validate 
+if not args.core:
+    logger.fatal('Must specify core with CV_CORE envrionment variable or --core')
+    os.sys.exit(2)
+
+if not args.yaml:
+    logger.fatal('Must specify the YAML build specification with --yaml')
+    os.sys.exit(2)
+
+#CFG_PATHS = [p.replace('<CV_CORE>', args.core.lower()) for p in CFG_PATHS]
+
+cfg_spec = read_file(file=args.yaml)
+temp_file = emit_make(cfg_spec=cfg_spec, prefix=args.prefix)
+
+logger.debug('File written to {}'.format(temp_file))
+print(temp_file)