R2023a Commit

HDL Coder compatible examples showcasing MATLAB to HDL, Simulink to HDL workflows.

hdldesignpatterns/framebasedmodels/medianFilter3.m

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+function J = medianFilter3(I) 
+%#codegen
+
+[Jmin3x3,Jmed3x3,Jmax3x3,~]                 = hdl.npufun(@myMedianKernel,[3 3],I); 
+[Jmin5x5,Jmed5x5,Jmax5x5,~]                 = hdl.npufun(@myMedianKernel,[5 5],I); 
+[Jmin7x7,Jmed7x7,Jmax7x7,~]                 = hdl.npufun(@myMedianKernel,[7 7],I); 
+[Jmin9x9,Jmed9x9,Jmax9x9,JnewCenterData9x9] = hdl.npufun(@myMedianKernel,[9 9],I); 
+
+
+J = hdl.npufun(@get_new_pixel, [1 1], Jmin3x3,Jmed3x3,Jmax3x3, ...
+    Jmin5x5,Jmed5x5,Jmax5x5, ...
+    Jmin7x7,Jmed7x7,Jmax7x7, ...
+    Jmin9x9,Jmed9x9,Jmax9x9,JnewCenterData9x9 ...
+    );
+
+end
+
+
+
+function [min,med,max,newCenterData] = myMedianKernel(mat)
+
+[nrows, ncols] = size(mat);
+prevCenterData = mat(ceil(nrows/2), ceil(ncols/2));
+[min, med, max] = sortAndComputeMinMaxMedian(mat(:)');
+newCenterData = get_center_data(min,med,max,prevCenterData);
+
+end
+
+
+function [new_data] = get_center_data(min,med,max,center_data)
+if center_data == min || center_data == max
+    new_data = med;
+else 
+    new_data = center_data;
+end
+end
+
+
+function new_pixel  = get_new_pixel(min3, med3, max3, ...
+                                    min5, med5, max5, ...
+                                    min7, med7, max7, ...
+                                    min9, med9, max9, ...
+                                    center_data)
+
+
+
+if (med3 > min3 || med3 < max3)
+    new_pixel = get_center_data(min3, med3, max3,center_data);
+elseif (med5 > min5 || med5 < max5)
+    new_pixel = get_center_data(min5, med5, max5,center_data);
+elseif (med7 > min7 || med7 < max7)
+   new_pixel = get_center_data(min7, med7, max7,center_data);
+else
+   new_pixel = get_center_data(min9, med9, max9,center_data);
+end
+end

hdldesignpatterns/framebasedmodels/runme_sim.m

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+% Run MEX based Simulation
+tic
+I = imread('lena_gray256_noise.TIF');
+I = im2gray(I);
+codegen medianFilter3 -args {I} -o medianFilter3
+J = medianFilter3(I);
+imshow(I);figure;imshow(J);
+toc

hdldesignpatterns/framebasedmodels/sortAndComputeMinMaxMedian.m

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+function [min, med, max] = sortAndComputeMinMaxMedian(inbuf)
+%#codegen
+
+numpixels = length(inbuf);
+
+tbuf = inbuf;
+
+for ii=coder.unroll(1:numpixels)
+    if bitand(ii,uint32(1)) == 1  
+        tbuf = compare_stage1(tbuf);
+    else
+        tbuf = compare_stage2(tbuf);
+    end
+end
+
+med = tbuf(ceil(numel(tbuf)/2));
+min = tbuf(1);
+max = tbuf(end);
+
+end
+
+function outbuf = compare_stage1(inbuf)
+numpixels = length(inbuf);
+tbuf = compare_stage(inbuf(1:numpixels-1));
+outbuf = [tbuf(:)' inbuf(numpixels)];
+end
+
+function outbuf = compare_stage2(inbuf)
+numpixels = length(inbuf);
+tbuf = compare_stage(inbuf(2:numpixels));
+outbuf = [inbuf(1) tbuf(:)'];
+end
+
+function [outbuf] = compare_stage(inbuf)
+
+step = 2;
+numpixels = length(inbuf);
+
+outbuf = inbuf;
+
+for ii=coder.unroll(1:step:numpixels)
+    t = compare_pixels([inbuf(ii), inbuf(ii+1)]);
+    outbuf(ii) = t(1);
+    outbuf(ii+1) = t(2);
+end
+
+end
+
+function outbuf = compare_pixels(inbuf)
+if (inbuf(1) < inbuf(2))
+    outbuf = [inbuf(1), inbuf(2)];
+else
+    outbuf = [inbuf(2), inbuf(1)];
+end
+end

hdldesignpatterns/matlabhdl/cosim_fil_sobel.m

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+%% Verify Sobel Edge Detection Algorithm in MATLAB-to-HDL Workflow
+% This example shows how to generate HDL code from a MATLAB design
+% implementing the Sobel edge detection algorithm.
+%
+
+% Copyright 2012-2023 The MathWorks, Inc.
+
+%% Set Up Example
+%
+% Run the following code to set up the design:
+%
+design_name = 'mlhdlc_sobel.m';
+testbench_name = 'mlhdlc_sobel_tb.m';
+
+mlhdlc_demo_dir = fullfile(matlabroot, 'toolbox', 'hdlcoder', 'hdldesignpatterns', 'matlabhdl');
+mlhdlc_temp_dir = [tempdir 'mlhdlc_sobel'];
+
+% create a temporary folder and copy the MATLAB files
+cd(tempdir);
+[~, ~, ~] = rmdir(mlhdlc_temp_dir, 's');
+mkdir(mlhdlc_temp_dir);
+cd(mlhdlc_temp_dir);
+
+% copy the design files to the temporary directory
+copyfile(fullfile(mlhdlc_demo_dir, design_name), mlhdlc_temp_dir);
+copyfile(fullfile(mlhdlc_demo_dir, testbench_name), mlhdlc_temp_dir);
+copyfile(fullfile(mlhdlc_demo_dir, 'mlhdlc_img_stop_sign.gif'), mlhdlc_temp_dir);
+
+%% Simulate the Design
+% It is a good practice to simulate the design with the testbench prior to
+% code generation to make sure there are no runtime errors.
+%
+
+mlhdlc_sobel_tb;
+
+
+%% Create a New HDL Coder Project
+%
+% Run the following command to create the HDL code generation project.
+%
+% coder -hdlcoder -new cosim_fil_sobel
+
+%% Specify the Design and the Test Bench
+%
+% # Drag the file "mlhdlc_sobel.m" from the Current Folder Browser
+% into the Entry Points tab of the HDL Coder UI, under the "MATLAB
+% Function" section.
+% # Under the newly added "mlhdlc_sobel_tb.m" file, specify the
+% data type of input argument "data_in" as "double (1 x 1)"
+% # Drag the file 'mlhdlc_sobel_tb.m' into the HDL Coder UI,
+% under "MATLAB Test Bench" section.
+%
+% <<cosim_fil_sobel_screen1.png>> 
+%
+
+%% Generate HDL Code
+%
+% # Click "Workflow Advisor".
+% # Right click on the "Code Generation" step in Workflow Advisor.
+% # Choose option "Run to selected task" to run all steps from the
+% beginning of the workflow through to HDL code generation.
+%
+
+%% Verify Generated HDL Code with Cosimulation
+%
+% To run this step, you must have one of the HDL simulators supported by
+% HDL Verifier. See {Supported EDA Tools}. You may skip this step if you do
+% not.
+%
+% 1. Select the "Generate cosimulation test bench" option.
+%
+% 2. Select the "Log outputs for comparison plots" option. This option
+% generates the plotting of the HDL simulator output, the reference MATLAB
+% algorithm output, and the differences between them.
+%
+% 3. For "Cosimulate for use with:", select your HDL simulator. The HDL
+% simulator executable must be on your system path.
+%
+% 4. To view the waveform in the HDL simulator, select "GUI" mode in the
+% "HDL simulator run mode in cosimulation" list.
+%
+% 5. Select "Simulate generated cosimulation test bench".
+%
+% 6. Click "Run". 
+%
+% When the simulation is complete, check the comparison
+% plots. There should be no mismatch between the HDL simulator output and
+% the reference MATLAB algorithm output.
+%
+% <<cosim_fil_sobel_screen2.png>> 
+%
+
+%% Verify Generated HDL Code with FPGA-in-the-Loop
+%
+% To run this step, you must have one of the supported FPGA boards (see
+% {Supported EDA Tools}). Refer to here for additional setup instructions
+% required for FPGA-in-the-Loop.
+%
+% In the "Verify with FPGA-in-the-Loop" step, perform the following steps:
+%
+% 1. Select the "Generate FPGA-in-the-Loop test bench" option.
+%
+% 2. Select the "Log outputs for comparison plots" option. This option
+% generates the plotting of the FPGA output, the reference MATLAB algorithm
+% output, and the differences between them.
+%
+% 3. Select your FPGA board from the "Cosimulate for use with:" list. If
+% your board is not on the list, select one of the following options: 
+%
+% * "Get more boards..." to download the FPGA board support package(s) (this
+% option starts the Support Package Installer)
+% * "Create custom board..." to create the FPGA board definition file for
+% your particular FPGA board (this option starts the New FPGA Board
+% Manager).
+%
+% 4. Ethernet connection only: Enter your Ethernet connection information
+% in the "Board IP Address" and "Board MAC Address:" fields. Leave the
+% "Additional Files" field empty.
+%
+% 5. Select "Simulate generated FPGA-in-the-Loop test bench".
+%
+% 6. Click "Run".
+%
+% When the simulation is complete, check the comparison plots. There should be no mismatch between the FPGA output and the reference MATLAB algorithm output. 
+%
+% <<cosim_fil_sobel_screen3.png>> 
+%
+
+%%
+% This ends the Verify Sobel Edge Detection Algorithm in MATLAB-to-HDL Workflow example.
+
+displayEndOfDemoMessage(mfilename)
+

hdldesignpatterns/matlabhdl/local_words.txt

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+# --*-conf-*---
+# Local Words for sbspell and sbcheck -check typos
+# This file is automatically maintained by sbspell.
+# Copyright 2011-2023 The MathWorks, Inc.
+
+ LocalWords:  sfir tb hdlcoder hdldesignpatterns matlabhdl ISIM tif prj
+ LocalWords:  ise sobel dfir tbn aesd FCSD fcsd mosaicking cdetect dlg FPGAs df
+ LocalWords:  vhd synth wo helptargets filespec hdlcodegen sobelfilter BMC ACS
+ LocalWords:  filterdelay commviterbihdl alg renormmethod sysobj BPSK PSK QPSK
+ LocalWords:  Deinterleaver os overline wl dti fixptcfg hdlcfg xout yt Virtex
+ LocalWords:  xc vh hcg XSG xl xsg ce hdlsrc xsgbbxcfg toolstrip ns