Fix missing RXD assignment, when PTS is not present

mupq · Sep 6, 2023 · da278f4 · da278f4
1 parent 8a24338
commit da278f4
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/src/main/scala/mupq/PQVexRiscvSim.scala b/src/main/scala/mupq/PQVexRiscvSim.scala
@@ -155,6 +155,7 @@ object PQVexRiscvSim {
 
       val uartTxd = dut.io.uart.txd
       val uartRxd = dut.io.uart.rxd
+      uartRxd #= true
 
       val uartDecoder = fork {
         sleep(1)