Lab and project implementations done for EEE102 course, Bilkent University, Spring 2021.
VHDL, Xilinx Vivado and Basys 3 is used for the labs and project.
In this repository, you can find 7 labs and 1 final project.
- Lab: Introduction to Digital Oscilloscopes
- Lab: Introduction to VHDL
- Lab: Combinational Logic Circuit
- Lab: Seven Segment Display
- Lab: Arithmetic Logic Unit
- Lab: Chronometer
- Lab: Greatest Common Divisor
Car Preventative Safety System including a ultrasonic sensor, IR sensor and IR remote control. Project written in VHDL and Basys 3 used for hardware implementation. A detailed description of the project can be found in project-report.pdf.
- Xilinx Vivado Design Suite